Vericnet is a hierarchical netlist comparator. It accepts most spice formats and can compare netlists from different technologies, even schematic netlists and test benches. This is very helpful when moving a design from one technology to another, or keeping track of schematic design changes. The comparison speed is one of the fastest available on the market. This version is a 30-day free trial version.
Other tools are available at www.vericsystems.com.
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Editorial
Upcoming Events
DAC 2012 at San Francisco CA - Jun 3 - 7, 2012
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