Chip/system co-simulation can provide the only effective way to identify chip-level power delivery issues that don't show up until the die is incorporated in the system. This presentation describes techniques for assessing a range of designs including 3D IC and 2.5D projects which incorporate silicon interposers. Sigrity products that are part of the TSMC reference flow are highlighted: XcitePI, PowerSI, OrbitIO, XtractIM and OptimizePI.
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Editorial
Upcoming Events
DAC 2012 at San Francisco CA - Jun 3 - 7, 2012
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