It’s no secret that power is emerging as the most critical issue in system-on-chip (SoC)
design today. Power management is becoming an increasingly urgent problem for
almost every category of design, as power density—measured in watts per square
millimeter—rises at an alarming rate.
From a chip-engineering perspective, effective energy management for an SoC must
be built into the design starting at the architecture stage; and low-power techniques
need to be employed at every stage of the design, from RTL to GDSII.
|
Editorial
Upcoming Events
DAC 2012 at San Francisco CA - Jun 3 - 7, 2012
|
|
|
