The profitability and overall viability of the semiconductor IC industry is heavily dependant on achieving
appropriate product yields. As designs sizes increase and geometries shrink, semiconductor yields must
be maintained at acceptable levels. In addition, the time required to achieve the acceptable volume yield
levels (time-to-yield), is also very important. There is wide acceptance that nanometer scale effects have a
significant impact on both nominal yield levels and time-to-yield numbers at the 90nm and the emerging
65nm nodes.
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Editorial
Upcoming Events
DAC 2012 at San Francisco CA - Jun 3 - 7, 2012
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