The burden that system-on-chip (SoC) design complexity places on logic designers and verification engineers is well-documented. But what about the silicon bring-up team? What happens when a critical bug slips through to silicon? Further costly design re-spins must be avoided, so it is absolutely essential to thoroughly debug the silicon as quickly as possible. But that’s very difficult because of the limited visibility into silicon.
|
Editorial
Upcoming Events
DAC 2012 at San Francisco CA - Jun 3 - 7, 2012
|
|
|
