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Featured Paper by Mobashar Yazdani and Mike Stahl This paper describes techniques used to audit IP for integration in chips ranging from custom designs to fully outsourced designs. Un-audited IP increases the risk to obtaining successful tapeouts on time. Many facets of the IP generation capability of IP providers have to be looked at, including IP quality, ease of integration, support, maintenance, and others, in an organized systematic manner which the paper will cover. Development in capability to incorporate IP into designs is essential to reduce the cost of designing ASICs. Industry has been working on standards to allow this to happen. We should some of the major areas where progress is essential and the reasons for working to standardize the IP transfer and management process.
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