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This paper describes the standalone functional ver fication of a family of PCI bridges, where each derivative connects a PCI bus to a different system bus like AHB and 60x Local Bus (a.k.a.XLB).The objective of the verif cation effort was to fully verify the bridge functionality including complex multi-master scenarios from both the PCI side and the system bus side,while achieving a high level of reuse across all the derivatives. The verification environment was implemented using Verilog,OpenVera,and OVA (OpenVera Assertions)running on VCS.
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