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Featured Paper by Walter Soto Encinas Junior, Alex Rocha Prado This paper describes the solutions devised for reusing legacy functional verification stimuli written in C and TestBuilder in non-TestBuilder environments written in languages like Verilog, OpenVera and SystemVerilog. These C stimuli rely on a behavioral model (also written in C) to check responses and originally used TestBuilder objects to drive/monitor signals on the device under verification. TestBuilder was also responsible for synchronizing the C and Verilog execution. The solutions presented here show how to replace TestBuilder with a thin software layer responsible for HDL signals access and synchronization, so that the legacy stimuli can run unchanged, protecting the investment of many persons-months. It also describes how to issue transactions defined in Verilog, OpenVera or SystemVerilog tasks from C stimuli. These solutions use PLI 2.0 (VPI), DirectC, DPI and POSIX threads to ensure correct communication and synchronization in all these scenarios.
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