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This paper proposes a design flow which utilizes DC FPGA as synthesis tool for prototyping large designs on multi-FPGA platforms which were deployed for real-time rapid prototyping and validation in two projects of the digital broadcasting domain. The basic design flow uses DC FPGA to synthesize EDIF netlists which serve as entry for the FPGA backend tools. The final FPGA implementation is performed by tool suites provided by Xilinx and the FPGA platform vendors. The deployed prototyping platforms were composed of Xilinx Virtex-II devices.
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