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Title : Interface-based OVM Environment Automation
Company : Duolog Technologies
Date : 14-May-2011
Downloads : 2

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The increasing size and complexity of today’s Systems-on-Chip is driving the adoption of modular, IP-centric design and verification flows. Increasingly complex IPs, sub-systems and systems require high levels of modularization, standardization and re-use and must be comprehensively verified as quickly and efficiently as possible. Advanced verification methodologies such as OVM[1] provide important verification capabilities, such as coverage-driven verification and reusable verification components, that leverage the benefits of object-oriented development. In order to quickly access these verification methodologies and apply them to the task at hand, it is important to automate the creation of as much of the verification infrastructure as possible. This paper presents a methodology for auto-generating much of the OVM verification environment for an IP using an interface-based executable specification, combined with a flexible generator framework. This methodology provides IP verification engineers with immediate access to advanced verification capabilities.
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