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Title
Company
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A Basic Mathematical Formalism for Representation and Analysis of RF/Microwave EDA and Design Flows PopularAWR Corporation 114519-Feb-2013
A Plethora of Ports: Making Sense of the Different Port Types within EM Simulators PopularAWR Corporation 127519-Feb-2013
ACE - Automated Circuit Extraction in the Design Flow PopularAWR Corporation 110119-Feb-2013
AWR's Support of Polyharmonic Distortion and Nonlinear Behavioral Models PopularAWR Corporation 111219-Feb-2013
Design and Optimization of a Board-to-Chip Transition PopularAWR Corporation 111419-Feb-2013
Design and Synthesis of a High Power PA PopularAWR Corporation 111619-Feb-2013
Design Flow for Base Station Antenna PopularAWR Corporation 111819-Feb-2013
Design of a Near Field Communication Antenna System PopularAWR Corporation 109619-Feb-2013
End-to-end Design and Realization of an X-band Transmission Analyzer PopularAWR Corporation 110119-Feb-2013
Exactly How EM Should Be Part of a Design Flow PopularAWR Corporation 110419-Feb-2013
High-Power Amplifier Design Example - SYMMIC Thermal Simulation from Microwave Office Projects PopularAWR Corporation 111519-Feb-2013
High-Speed Serial Backplane - SERDES Design Example PopularAWR Corporation 113619-Feb-2013
Leverage Circuit Envelope Simulation to Improve 4G PA Performance PopularAWR Corporation 110719-Feb-2013
Steady State and Transient Thermal Analyses of GaAs pHEMT Devices PopularAWR Corporation 109219-Feb-2013
Synthesizing & Optimizing a Hairpin Bandpass Filter with AWR Tools PopularAWR Corporation 110919-Feb-2013
The Advantages of Multi-rate Harmonic Balance PopularAWR Corporation 109519-Feb-2013
Understanding and Correctly Predicting Critical Metrics for Wireless RF Links PopularAWR Corporation 109819-Feb-2013
Understanding Available Tools For RF System-in-Package and Multi-Chip-Module Design and Optimization PopularAWR Corporation 110019-Feb-2013
Understanding Grounding Concepts in EM Simulators PopularAWR Corporation 131619-Feb-2013
Upfront RF Planning Speeds System-Level Analysis PopularAWR Corporation 109219-Feb-2013
Clock and Reset Ubiquity: A CDC Verification Perspective PopularReal Intent, Inc. 110213-Feb-2013
Solving Engineering File Transfer Problems: Two Different Days in the Life of an Engineer PopularOpenText connectivity Solutions Group 145905-Apr-2012
Mastering the Magic of Multi-Patterning Mentor Graphics 11402-Dec-2014
Pattern Matching: Blueprints for Further Success Mentor Graphics 7302-Dec-2014
Improve Reliability with Accurate Voltage-Aware DRC Mentor Graphics 6016-Sep-2013
Improving Design Reliability by Avoiding EOS Mentor Graphics 9116-Sep-2013
Reduce Verification Complexity in Low/Multi-Power Designs Mentor Graphics 65016-Sep-2013
End-To-End System Design: Advantages of an Integrated Tool for Frequency Planning, Budget Analysis and More AWR Corporation 107519-Feb-2013
Hardware in the Loop: Visual System Simulator and TestWave Software Integrate Measurement Data into the Design Process AWR Corporation 108019-Feb-2013
How to Optimize an LTE Amplifier Performance Using Visual System Simulator AWR Corporation 108719-Feb-2013
Improved Circuit Design Flow using Modelithics Passive Models AWR Corporation 108419-Feb-2013
Integration of Signal Analyzer and Visual System Simulator AWR Corporation 107519-Feb-2013
Matching Network for a 5.8GHz WiMAX Amplifier AWR Corporation 107919-Feb-2013
Using LabVIEW in the AWR Design Environment To Design Complex Circuits for Wireless Applications AWR Corporation 107919-Feb-2013
Using Visual System Simulator to Optimize SDR Performance AWR Corporation 107619-Feb-2013
Visual System Simulator Co-simulates with NI’s LabVIEW for Enhanced Signal Processing Capabilities AWR Corporation 109019-Feb-2013
Challenges in Verification of Clock Domain Crossings Real Intent, Inc. 99313-Feb-2013
JasperGold Apps - Interoperable Application-Specific Solutions for Formal Verification Throughout the Design Flow Jasper Design Automation 1429-Oct-2012
The Second Life of Data: How 3D InterOp from Spatial Powers Data Reuse Spatial 423-Oct-2012
Silicon Realization—A New Approach to Faster, Better, and More Profitable Silicon Cadence Design Systems, Inc. 729-Apr-2012
Randomization and Functional Coverage in VHDL Aldec 4712-Jan-2012
Considerations for Bulk CMOS to FD-SOI Design Porting SOI Industry Consortium 706-Dec-2011
//yx channel_transform Channel to Channel Assignment Guidelines Y Explorations, Inc. 025-Sep-2011
Collaborative design of the FIR Filter Based Hardware and Software Y Explorations, Inc. 125-Sep-2011
System-Level Design Tools and RTOS for Multiprocessor SoCs Y Explorations, Inc. 225-Sep-2011
HIGH SPEED CMOS ANALOG-TO-DIGITAL CONVERTER CIRCUIT FOR RADIO FREQUENCY SIGNAL Micro Magic, Inc. 813-Sep-2011
Trenz Electronic GigaBee XC6SLX series user manual Trenz Electronic GmbH 211-Sep-2011
VN-Spec / vManager Interoperability Brief TransEDA 011-Sep-2011
BSIM3v3.1 Model Parameter Extraction & Optimization The MOSIS Service 509-Sep-2011
Zeit ist Geld – Echtzeit ist viel Geld Timingoptimierungen bei der Aktivlenkung von BMW Symtavision GmbH 003-Sep-2011
Enhanced interconnect medium simplifies test & verification Ironwood Electronics 030-Aug-2011
IC Socket Footprint – Why is it important? Ironwood Electronics 330-Aug-2011
Package Converter Compliments Chip Obsolescence Ironwood Electronics 030-Aug-2011
Role of Sockets in IC Product Life Cycle Ironwood Electronics 030-Aug-2011
AWR® iFilter™ Application Note AWR Corporation 427-Aug-2011
Adapting AMI to Support Back-Channel Communications SIGRITY, Inc. 524-Aug-2011
Analyzing Chips in a System Context SIGRITY, Inc. 324-Aug-2011
Antenna Design IMST GmbH 621-Aug-2011
IMST Imagefolder IMST GmbH 021-Aug-2011
Multicycle path analysis and verification in static timing analysis ASICServe 27116-Aug-2011
Designing a CE-ATA Verification Environment for SoC Applications Globetech Solutions 026-Jul-2011
New Methodology on Electro-Thermal Characterization and Modeling of Large Power Drivers Using Lateral PNP BJTs Gradient Design Automation Inc. 426-Jul-2011
Practical chip-centric electro-thermal simulations Gradient Design Automation Inc. 326-Jul-2011
STIL Verifier: Post-Silicon Functional Test Automation within Cadence Incisive Globetech Solutions 226-Jul-2011
Thermal Properties and Reliability of GaN Microelectronics Gradient Design Automation Inc. 226-Jul-2011
The two "wildly different" reasons we bought Arithmatica Forte Design Systems 115-Jul-2011
Expect faster adoption of IDEs in hardware design and verification AMIQ 4728-Jun-2011
Fast controller development dSPACE GmbH 314-May-2011
dw-2000TM HLVS Design Workshop, Inc. 124-Apr-2011
Photonics Element Library Design Workshop, Inc. 224-Apr-2011
60nm and 90nm Interconnect Modeling Chalenges OEA International, Inc. 37013-Apr-2011
Common Pitfalls in Ethernet Designs at Ethernet Alliance 2011 MIPI Alliance 2011 201-Apr-2011
Common Pitfalls in MIPI HSI Designs at MIPI Alliance 2011 MIPI Alliance 2011 5901-Apr-2011
Complete NAND Flash Solution: Logic, PHY and File System Software Arasan Chip Systems 424-Mar-2011
Facilitating Unreachable Code Diagnosis and Debugging Avery Design Systems, Inc 812-Mar-2011
Finding Reset Nondeterminism in RTL Designs – Scalable X-Analysis Methodology and Case Study Avery Design Systems, Inc 512-Mar-2011
Interoperable IP Delivery Aldec 1011-Mar-2011
“iWave announced its i.MX53 SOM on the same day Freescale announced the availability of its i.MX53 SoC” iWave Systems Technologies Pvt.Ltd 105-Mar-2011
Creating Virtual Platform using The OCP-IP Modeling kit CircuitSutra Technologies Pvt Ltd. 123-Feb-2011
Accelerating Innovation in Electronic Product Development Dassault Systèmes 1027-Oct-2010
Verilog Test Suites Verific Design Automation Inc. 11806-Oct-2010
The economies of outsourcing Verific Design Automation Inc. 3102-Oct-2010
Gates-on-the-Fly fixes Logic Equivalence Check Failures SynaptiCAD, Inc. 4917-Sep-2010
DO-254 In-Hardware Verification Aldec 2016-Sep-2010
Dynamic Design Analysis - Data Mining For Verification Closure AXIOM Design Automation 2902-Sep-2010
What's New in VSS v2009 Applied Wave Research, Inc. (AWR) 019-Aug-2010
Digital Place and Route in a Custom Design Environment SpringSoft, Inc. 5016-Aug-2010
The Inefficiency of C++, Fact or Fiction? IAR Systems 227-Jul-2010
PCell Caching in OpenAccess SpringSoft, Inc. 4726-Jul-2010
Formal Analysis: A Valuable Tool for Post-Silicon Debug Jasper Design Automation 816-Jul-2010
Survey of Chip Designers on the Value of Formal Verification Across the Spectrum of Applications Jasper Design Automation 1016-Jul-2010
Toward Harnessing the True Potential of IP Reuse Jasper Design Automation 716-Jul-2010
Applying Formal Methods to a PCI-Express Transmit Retry Buffer Jasper Design Automation 2015-Jul-2010
Formal Verification Deployment Reveals Return On Investment Jasper Design Automation 1115-Jul-2010
Two Major Shifts Impacting Software Development Productivity Spatial 115-Jun-2010
GiDEL COTs Solutions GiDEL 307-Jun-2010
Formal Verification for Challenging Low-Power Designs Jasper Design Automation 3227-May-2010
Cadence EDA360 Vision Paper Cadence Design Systems, Inc. 3230-Apr-2010
ZeBu™: A Unified Verification Approach for Hardware Designers and Embedded Software Developers Eve, Inc. 1822-Apr-2010
Invarian Addresses Sign-Off Predictability Issues With Concurrent Analysis For Power, Voltage, Temperature, And Timing Invarian 816-Apr-2010
Advanced Scgematic-Driven Layout Automation SpringSoft, Inc. 2011-Mar-2010
Challenges and Requirements for Power-Aware Degug SpringSoft, Inc. 2711-Mar-2010
Introducing Functional Qualification SpringSoft, Inc. 2411-Mar-2010
ENABLING ASSERTION BASED VERIFICATION Zocalo Tech 6212-Jan-2010
Accelerating CRCs on eSi-RISC with user-defined instructions EnSilica Ltd 110-Jan-2010
Total 105 links listed, not including links in sub-categories.
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