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Our previous designs have had excellent first silicon perfromance requiring at most metal/via changes in few cases. Below is a sampling of some of our earlier projects successfully delivered to customers.

User Reviews

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Atrenta Spring Clean!

Featured Video

"End-to-End Formal and Oski's Live Verification Challenge at DAC", Vigyan Singhal
Oski Technology

"Update: Catapult C-Synthesis, 20-60% Savings with PowerPro, SLEC", Doug Aitelli
Calypto

New 3rd Generation Debug Platform, Verdi³™, Mark Milligan, SpringSoft
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Videos and Movies

"New Verissimo SystemVerilog Testbench Linter", Cristian Amitroaie
AMIQ

"Joint ANSYS / Apache Interview on Product Roadmap and Integration", Aveek Sarkar, Apache & Larry Williams, ANSYS
ANSYS

"New JasperGold Apps and 60% Growth", Rajeev Ranjan
Jasper

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Corporate Newsletters

Cadence Newsletter - May 2012

AMIQ: Come and learn about our code development and analysis tools in Booth #1804 at DAC

IPC Outlook: What are the Pros and Cons of Cleaning No-Clean?

Apache Customers Present at DAC 2012, Booth #1813

SoCIP Newsletter, Spring 2012

More Corporate Newsletters

Important Notices

AMD, Broadcom, NVidia speak on Design & IP Management @ DAC, June 4, San Francisco

John Cooley's DAC TroubleMaker's Panel on June 4 in San Francisco

The Future of the IP Industry is in Your Hands: Register Now for Semico's IP Conference

Video Invitation to "Milestones to Building a Successful Technology Software Company", May 31

IPC Conference on Flexible Circuits (June 12-14)

Editorial

	Mark Gilbert EDA Careers Corner & More A Must Read: The Most Common Catastrophic Interviewing Mistakes Made By Companies…
Archived Careers Corner

	Dr. Russ Henke EDA & IP Commentary Morning at the Oasys
Archived Commentary

More Careers Corner | Commentary

Jobs

Design Environment Flow Architect, location Nijmegen for NXP Semiconductors at Nijmegen, Netherlands

Field AE’s Physical Domain Valley, Austin, SOCAL for EDA Careers at San Jose, CA

Technical Marketing Manager – RTL Analysis and CDC Verification for Atrenta at San Jose, CA

Technical R&D Manager for SpringSoft USA, Inc. at San Jose, CA

EDA Field Application Engineers Verification AUSTIN & VALLEY for EDA Careers at San Jose, CA

Principal Member of Technical Staff, Graphical User Interface (GUI) for EDA Careers at San Jose, CA

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Upcoming Events

SNUG United Kingdom at Hilton Reading Hotel Drake Way Reading United Kingdom - May 24, 2012

The Top Five Challenges to Effective Cost Controls at The Carlton Hotel. 88 Madison Avenue (between 28th & 29th Street). NY - May 24, 2012

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AMIQ

Calypto:Empowering the Next Level of Design

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