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Title : Getting Rid of False Errors when Verifying LSI Designs Including Non-Determinism
Company : DVCon 2011
File Name : 12_3.pdf
Size : 357870
Type : application/pdf
Date : 22-Mar-2011
Downloads : 9

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Featured Paper by Matthieu Parizy & Hiroaki Iwashita

The recent years have seen LSI design complexity continuing to rise sharply. This phenomenon translates itself in the design specifications as they include non-deterministic parts more and more frequently. For example, in cases of designs using packets for data transmission, packets transfer order is determined by precise rules. But, depending on the timing of the transactions, the final order might be hard to predict.
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