All Categories : Bookmark and Share

Title : Verifying clock-domain crossing at RTL IP level using coverage-driven methodology
Company : DVCon 2010
File Name : 08_LO100.pdf
Size : 268522
Type : application/pdf
Date : 26-Mar-2011
Downloads : 25

Rate This File
5 Stars
4 Stars
3 Stars
2 Stars
1 Star

Featured Paper by Jean-Fran├žois Vizier, Dennis Ramaekers & Zheng Hai Zhou

Usage of a GALS approach for a SoC implies the creation of several asynchronous paths. These paths can be critical for the system as some of them are part of the system bus. They require special attention during verification.
User Reviews More Reviews Review This File

EMA:

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Retail Therapy: Jump starting Black Friday
Peggy AycinenaIP Showcase
by Peggy Aycinena
REUSE 2016: Addressing the Four Freedoms
More Editorial  
Jobs
AE-APPS SUPPORT/TMM for EDA Careers at San Jose-SOCAL-AZ, CA
ACCOUNT MANAGER MUNICH GERMANY EU for EDA Careers at MUNICH, Germany
FAE FIELD APPLICATIONS SAN DIEGO for EDA Careers at San Diego, CA
Development Engineer-WEB SKILLS +++ for EDA Careers at North Valley, CA
Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
Upcoming Events
Zuken Innovation World 2017, April 24 - 26, 2017, Hilton Head Marriott Resort & Spa in Hilton Head Island, SC at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
CST Webinar Series



Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy