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Featured Paper by Michael Boukaya Today, the market demands more powerful devices and long battery life. The increasing use of battery-powered portable (often wireless) electronic systems is driving the demand for IC and SoC devices to consume the smallest possible amounts of power. In addition, standby power consumption emerges as a more dominant parameter that should be addressed. Low power processes (LP) are widely adopted to minimize the standby power. However, usage of such processes usually limits the frequency of the devices. The request for an IC to be design in low power technology means that designers need to creatively leverage advance power saving methodologies to create new techniques for decreasing power consumption while increasing device functionality and reaching high frequency. Power reduction techniques may vary from hardware implementation techniques and specific system architectures.
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