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Semiconductor product value increasingly depends on ¡°equivalent scaling¡± achieved by design and design-formanufacturability (DFM) techniques. This talk addresses trends and a roadmap for ¡°equivalent scaling¡± innovation at the designmanufacturing interface. The first part will discuss precepts of electrical DFM. What are dominant aspects of manufacturing variability and design requirements? Can designs match process, or must process inevitably adapt to designs? In what sense can concepts of ¡°virtual manufacturing¡± or ¡°statistical optimization¡± succeed in the design flow? How should design technology balance analyses that preserve value, versus optimizations that extend value? How should we balance preventions (correct by construction), versus early interventions, versus cures (construct by correction), versus ¡°do no harm¡± opportunism? Or, tools that can model and predict well, versus tools that can make upstream assumptions come true? The second part will give a roadmap for electrical DFM technologies, motivated by emerging challenges (stress/strain engineering, mask errors, double-patterning lithography, etc.) and highlighting needs for ¡Ü 45nm nodes.
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