|
Featured Paper by Andrew B. Kahng†, Xu Xu and Alex Zelikovsky Increasing transistor densities, smaller feature sizes, and the aggressive use of RET techniques with each successive process generation have collectively presented new challenges for current fracture tools, which are at the heart of layout data preparation. One main challenge is to reduce the number of small dimension trapezoids (slivers) to improve mask yield since the sliver count reflects the risk of mask critical-dimension errors.
|
||||||
|
||||||
|
||||||
