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Timing divergence has a critical impact on the economic viability of migrating to sub-65nm process nodes. Clock concurrent optimization (CCOpt) is a revolutionary new approach to timing optimization: it merges physical optimization into clock tree synthesis and simultaneously optimizes clock delay and logic delay using a single unified cost metric. With CCOpt technology, engineers can achieve timing convergence and have a new degree of freedom to design and integrate faster, smaller, lower-power digital chips.
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