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A front-end ASIC chip designed to collect signals from CCD or CMOS photodetectors allows the realization of a compact and low-power data acquisition system performing analogue processing and digitalization. The device has been fabricated in Rad-Hard technology and several design solutions have been used, both in the digital and in the analogue section, to improve the performance and to reduce the susceptibility to single event effects. The paper describes the chip design and the experimental characterization of the prototypes before and after radiation tests.
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