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Creating complex electronic systems has never been easy, but in recent years it has become truly daunting. It now takes an average of $40 million to develop a system-on-chip (SoC), a big risk even for the largest companies. Missteps can drive the expense up further. A single silicon respin (refabrication of the chip) due to a bug can cost millions of dollars and delay timeto market by months, crippling a product’s chances of success. The margin for error is shrinking, yet the uncertainties and intangibles of development processes make errors nearly inevitable. Only 15 percent of SoCs are completed on schedule, and more than half have to be respun once or more. Things are getting more difficult, not easier. Chip complexity is skyrocketing as geometries drop to 90nm and below, as gate counts climb into the tens of millions and transistor counts exceed 500 million. More mixed-signal (digital and analog) circuitry is being combined on chips, compounding the technical challenges. The complexity of embedded software--a critical component of SoCs--is rising even faster than hardware complexity. At the same time, the consumerization of electronic systems has brought additional pressures to bear: shorter product life cycles, faster times to market, fierce price competition, demands for lower power consumption--all of which are squeezing profit margins. Another complication stems from the growing geographic dispersion and independence of development teams contributing different components and intellectual property (IP) to a system. Ensuring that these parts come together quickly and seamlessly, with uniform high quality--despite the disparate locations, skill sets and design practices of the teams--is increasingly difficult. Click here for your copy of the white paper
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