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Why are more chips late to market and cost three times more to design at 90-nanometer (nm) than at 130nm? Today’s ASSPs and ASICs are huge, approaching one billion transistors, with clock speeds exceeding 1-GHz. Engineers struggle to manage the complexity of devices that achieve these levels of performance and size. A natural reaction to these challenges by semiconductor companies is to add more engineers to relieve the pressure, which drives up costs. And, yet the chips still takes twice as long to design, and the costs continue to increase. It is estimated that a 65nm ASSP will cost $55 million to develop.
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