Low-noise, low residual offset, chopped amplifiers for high-end applications

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6.6. Conclusions

This chapter dealt with low-noise, low residual offset, chopped amplifiers for high-end applications. In the previous chapter a chopped transconductance amplifier has been presented. This amplifier is capable of reducing 1/f noise and offset by chopping up to 1MHz but the residual offset can be as high as 370m V. Here we have investigated further the possibility of reducing the charge injection residual offset and the increase of the chopper frequency up to 10MHz.

In some applications, an amplifier has to drive a low-ohmic load with high power efficiency. Driving a low ohmic load of 32W with a rail to rail output, the opamp has to deliver some 160mA to the load. To reduce power consumption, a class AB output stage is therefore needed. The output stage introduces its own offset which is added to the total offset. If low offset is a desired constraint, the contribution of the output stage to the total offset should be minimized. This chapter focuses on the design and the realization of low voltage amplifiers with rail to rail class AB output stages capable of chopping up to 10MHZ, with low noise, high linearity and low residual offset. The generality of the method makes them suited for a large class of designs.

The chopped amplifiers presented in this chapter are primarily meant as amplifiers capable of driving headphones in portable digital audio. In those applications, extra offsets give extra dissipation in the load. It is also desired to have high linearity and low noise for all possible loads. The first amplifier has been realized in a 0.8mm CMOS. Measurements show a dynamic range of 111dB for the amplifier configured as a follower when chopping at 1MHz. For high ohmic loads, the linearity is better than -91dB for 1.5V voltage swing. For low ohmic loads, the THD is better than -83dB. The power consumption is 1.8mW from a 3.3V power supply. The class AB control circuit of the output stage is limiting the lowest value of the supply voltage at about 1.8V.

The second amplifier designed in 0.5mm CMOS technology has a new class AB output stage which can work at lower supply voltages. The open loop gain of this amplifier has been increased to 92dB by using gain boosting techniques. Offset simulations show a static offset of 1.67mV. Chopping at 10MHz, the simulated residual offset is 450m V but at 1KHz chopping, the simulated residual offset is 10m V. The linearity of the opamp is better than -85dB for signal amplitudes close to 2.4Vpp. The power consumption of the opamp is 1.5mW from a 3.3V power supply voltage being dominated by the power consumption of the class AB output stage. It can work down to 1.4V with reduced swing and dynamic range.

 True Circuits: Ultra PLL

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