CHAPTER 4

Gm-C integrators for low-power and low voltage applications. A gaussian polyphase filter for mobile transceivers in 0.35


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References

[1] E.A.Vittoz, "Low-Power Design: Ways to approach the limits", IEEE International Solid-State Circuits Conference, pp. 14-18, 1994.

[2] G. Groenewold, "Optimal dynamic range integrators" , IEEE Transactions on Circuits and Systems-I: Fundamental theory and Applications, Vol.39, no. 8, pp. 614-627, August, 1992.

[3] R. Castello, "Low-voltage continuous-time filters", Proceedings of the Workshop on Advances in Analog Circuit Design, Lausanne, Switzerland, 1996.

[4] M.A.T. Sanduleanu, A.J.M. van Tuijl and R.F.Wassenaar, "Large swing, high linearity transconductor in 0.5mm CMOS technology", Electronics Letters, vol.34, no.9, pp. 878-880, April 1998.

[5] M.A.T. Sanduleanu, A.J.M. van Tuijl, E. Klumperink, R.F.Wassenaar, "Low-voltage large swing transconductor", Proceedings of the 1997 European Conference on Circuit Theory and Design- ECCTD ’97, Budapest, pp.1412-1417, Sept.,1997.

[6] C.H.J. Mensink, B. Nauta, "CMOS tuneable linear current divider", Electronics Letters, vol. 32, no.10, pp. 889-890, May 1996.

[7] H. Wallinga and K. Bult, "Design and analysis of CMOS analog signal processing circuit by means of a graphical MOST model", IEEE J. Solid-State Circuits, vol. SC-22, pp. 672-680, June 1989.

[8] B. Nauta, "Analog CMOS low-power design considerations", Low Power-Low Voltage Workshop at ESSCIRC’ 96, Neuchatel-Switzerland, September 1996.

[9] C.H.J. Mensink, B. Nauta, H.Wallinga, "A 5.5MHz CMOS low-pass filter using a ‘soft-switched’ transconductor", Proceedings of the ESSCIRC ’96, pp. 84-87, Neuchatel, September 1996.

[10] C.H.J. Mensink, "Analogue transconductors for sub-micron CMOS technology", PhD Dissertation, ISBN: 90-9009612-4, pp. 30-31, University of Twente, September 1996.

[11] S.L. Smith and E. Sanchez-Sinencio, "Low voltage integrators for high frequency CMOS filters using current mode techniques", IEEE Trans. Circuits Syst-II, vol.43, no.1, pp.39-48, Jan.1996.

[12] S.L. Smith and E. Sanchez-Sinencio, "3V high-frequency current-mode filters", Proc. Int. Symp. Circuits Syst. , May, 1993, Chicago, IL., pp.1459-1462.

[13] B. Nauta, "A CMOS transconductance-C filter for very high frequencies" IEEE J. Solid-State Circuits, vol.27.,pp.142-153, Feb. 1992.

[14] M.Steyaert, J.Crols, S. Gogaert and W.Sansen, "Low-voltage analog CMOS filter design" IEEE Int. Symp. Circuits Syst. 1993, vol2, pp. 1447-1450, May 1993.

[15] M.J. Gingel, "Single sideband modulation using sequence asymetric polyphase networks", Electrical Communication, vol.30, pp.21-25, 1973.

[16] N. Boutin, "Complex signals" IEEE journal of Solid States Circuits, vol.12, pp.27-33,1989

[17] S.Darlington, "Realization of constant phase difference", BSTJ volXXXIX, Jan.1950,pp.94-104.

[18] H.J.Orchard, "Synthesis of wideband two-phase networks", Wireless Engineering, March 1950, pp.81-82.

[19] D.K.Weaver, "Design of RC Wide-Band 90-Degree Phase Difference Network", Proc. Of the IRE, vol.38, July 1950, pp.754-770.

[20] W.Saraga, "The design of wide-band phase splitting networks", Proc. Of the IRE, Vol.38, July 1950, pp.754-770.

[20] J.C. Rudell, J.A. Weldon, P. Gray, "An integrated GSM/DECT Receiver Design Specifications", UCB Research Laboratory Memorandum, Memo#: UCB/ERL M97/82

[21] A.I.Zverev "Handbook of Filter Synthesis" John Wiley & Sons, Inc., 1967

[22] J. Crols and M. Steyaert, " CMOS wireless transceiver design", Kluwer Academic Publishers, 1997, ISBN 0-7923-9960-9

[23] J. Crols and M. Steyaert, " An Analog Integrated Polyphase Filter for a High Performance Low-IF Receiver", Proc. VLSI Circuits Symposium, Kyoto, pp.87-88, June 1995.

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