CHAPTER 1

Introduction


Prev TOC Next

REFERENCES

[1] N. Weste, K. Eshragian, " Principles of CMOS VLSI design", Reading MA, Addison Wesley, 1985.

[2] J.S. Ward et al., "Figures of merit for VLSI implementations of digital signal processing algorithms", Proc. Inst. Elec. Eng., vol. 131, part F, pp.64-70, Feb. 1984.

[3] M. Kahumu, M. Kinugawa, "Power-supply voltage impact on circuit performance for half and lower submicrometer CMOS LSI", IEEE Trans. Electron Devices, vol.37, n0.8, pp.1902-1908, Aug. 1990.

[4] M. Nagata, "Limitations, innovations and challenges of circuits and devices into half-micron and beyond", Proc. Symp. VLSI circuits, pp.39-42, 1991.

[5] J. Borel, "LP/LV circuits in the deep submicron era" in the Proceedings of the 2nd IEEE-CAS Region 8 Workshop on Analog an Mixed IC Design, Baveno, Italy, 1997.

[6] M.A. Cirit, " Estimating dynamic power consumption of CMOS circuits", Proc. IEEE Int. Conf. Computer Aided Design, pp.534-537, Nov. 1987.

[7] S.R. Powell and P. Chan, "Estimating power dissipation of VLSI signal processing chips: The PFA technique", VLSI Signal Processing IV, New-York: IEEE Press, 1990, Chapter 24.

[8] H.J.M. Veendrick, "Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits", vol. Sc-19, pp. 468-473, Aug. 1984.

[9] B. Nadel, "The Green Machine", PC Magazine, vol.12, no.10, pp.110, May, 1993.

[10] J. Borel, "ESSCIRC '97 low-power, low-voltage workshop", Southampton, UK, Sept.1997.

[11] J. Rapeli, "Requirements and opportunities for integrated circuit technologies for mobile communications" invited paper at the "5th IEEE International Conference on Electronics Circuits and Systems ICECS '98".

[12] J. Borel, "LP/LV circuits in the deep submicron era" in the Proceedings of the 2nd IEEE-CAS Region 8 Workshop on Analog an Mixed IC Design, Baveno, Italy, 1997.

[13] E. Vittoz, "Future of analog in the VLSI environment", Proc. ISCAS' 90, pp. 1372-1375, 1990.


Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
H-1B Visa: de Geus’ tragedy looms large
Peggy AycinenaIP Showcase
by Peggy Aycinena
IP for Cars: Lawsuits are like Sandstorms
More Editorial  
Jobs
Staff Software Engineer - (170059) for brocade at San Jose, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Mechanical Designer/Engineer for Palo Alto Networks at Santa Clara, CA
Lead Java Platform Engineer IOT-WEB for EDA Careers at San Francisco Area, CA
Technical Support Engineer for EDA Careers at Freemont, CA
CAD/CAM Regional Account Manager (Pacific Northwest) for Vero Software Inc. at Seattle, WA
Upcoming Events
2017 IoT Developers Conference at Santa Clara Convention Center California - Apr 26 - 27, 2017
Embedded Systems Conference ESC Boston 2017 at Boston Convention & Exhibition Center Boston MA - May 3 - 4, 2017
2017 GPU Tech Conference at San Jose McEnery Convention Center 150 West San Carlos Street San Jose CA - May 8 - 11, 2017
High Speed Digital Design and PCB Layout at 13727 460 Ct SE North Bend WA - May 9 - 11, 2017
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy