Power, accuracy and noise aspects in CMOS mixed-signal design

Title: Power, accuracy and noise aspects in CMOS mixed-signal design
Author: Sanduleanu, Mihai Adrian Tiberiu
ISBN: 90-3651265-4
©1999, Mihai A.T. Sanduleanu

Table of Contents

Selected Symbols and Abbreviations
 
Chapter 1   Introduction
  1.1. Motivation
  1.2. Problem definition
  1.3. Scope and outline
  References
 
Chapter 2 Power considerations in sub-micron digital CMOS
  2.1. Introduction
  2.2. Fundamental limits
  2.3. From fundamental limits to practical limits of power. An architecture level approach
  2.4. S/N ratio and power in fixed point applications
  2.5. Adders and computational power
  2.6. Ways to low-power in digital
  2.7. Example of a digital video filter
  2.8. Conclusions
  2.8. References
 
Chapter 3 Power considerations in sub-micron analog CMOS
  3.1. Introduction
  3.2. Process tuning towards digital needs. Consequences on analog
  3.3. Fundamental limits
  3.4. From fundamental limits to practical limits of power. Noise related power
  3.5. From fundamental limits to practical limits of power. Mismatch related power
  3.6. Power estimations in continuous time filters
  3.7. Conclusions
  References
 
Chapter 4 Gm-C integrators for low-power and low voltage applications. A gaussian polyphase filter for mobile transceivers in 0.35mm CMOS
  4.1. Introduction
  4.2. Large swing and high linearity transconductor
  4.3. Low voltage current Gm-C integrator with high power efficiency
  4.4. Low-power luminance video filter. Noise driven power
  4.5. Low-power, gaussian, polyphase filter for mobile transceivers. Matching driven power
  4.6. Conclusions
  References
 
Chapter 5 Chopping: a technique for noise and offset reduction
  5.1. Introduction
  5.2. Ways to reduce offset and 1/f noise
  5.3. Chopping seen as a modulation technique
  5.4. Noise modulation
  5.5. Chopped amplifiers and offset reduction
  5.6. Low-power low-voltage chopped transconductance amplifier for noise and offset reduction
  5.7. A low-power bandgap voltage reference
  5.8. Conclusions
  References
 
Chapter 6 Low-noise, low residual offset, chopped amplifiers for high-end application
  6.1. Introduction
  6.2. Low-pass filtering in a digital audio system. Application specific constraints
  6.3. The gain stage
  6.4. A low noise, low residual offset, chopped amplifier in 0.8mm CMOS
  6.5. A low noise, low residual offset, chopped amplifier in 0.5mm CMOS
  6.6. Conclusions
  References
 
Chapter 7 A 16-bit D/A interface with Sinc approximated semidigital reconstruction filter
  7.1. Introduction
  7.2. Bitstream D/A conversion system with time-discrete filtering
  7.3. S-D modulators and noise shaping
  7.4. Semidigital FIR filter principles
  7.5. Semidigital FIR filter design
  7.6. Noise properties of the D/A interface
  7.7. Realisation
  7.8. Experimental results
  7.9. Interpolative D/A converter with Sinc approximation in the time domain
  7.10. Conclusions
  References
 
Chapter 8 Conclusions
  8.1. Summary
  8.2. Conclusions
  8.3. Original contributions
  8.4. Recommendations for further research
 
Appendix 1
 
Appendix 2
 
Appendix 3
 
CST: Webinar November 9, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
DVCon Europe 2017: Munich and So much more
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Upcoming Events
25th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2017) at Yas Viceroy Abu Dhabi Yas Marina Circuit, Yas Island Abu Dhabi United Arab Emirates - Oct 23 - 25, 2017
ARM TechCon 2017 at Santa Clara Convention Center Santa Clara CA - Oct 24 - 26, 2017
MIPI DevCon Bangalore 2017 at The Leela Palace Bengaluru India - Oct 27, 2017
MIPI DevCon Hsinchu City 2017 at Sheraton Hsinchu Hotel Taiwan - Oct 31, 2017
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise