Bit-Slice Design: Controllers and ALUs

by Donnamaie E. White

Copyright © 1996, 2001, 2002 Donnamaie E. White

 
 

Preface

Table of Contents

1. Introduction

2. Simple Controllers

3. Adding Programming Support to the Controller

4. Refining the CCU

5. Evolution of the ALU

6. The ALU and Basic Arithmetic

7. Tying the System Together

Glossary

 

 

Preface

Last Edit November 4, 1996; July 7, 2001

Table of Contents
Term Glossary

This text has been compiled from the popular Customer Education Seminar, ED2900A, Introduction to the Am2900 Family, offered by AMD (Advanced Micro Devices) in the 1980s. No attempt was made to duplicate all of the material presented in the customer seminar. The intent was to present a true "introduction" for the undergraduate hardware or software student that could be covered in one quarter or semester. The ED2900A seminar assumed that the attendee either has a background in assembly level programming or has a background in SSI/MSI design. This text also makes this assumption. [Read: if you do not know what a MUX is, or that programming is done in bits, go find out and then come back.]

The flow is an orderly evolution of a CCU design, adding one functional block at a time. The material is presented in a dual approach, referring to both the hardware and the firmware, or the software impact, as each feature is discussed.

The controllers are presented first, followed by the RALUs and their support chips. Interrupts are presented in two sections, broken down by the hardware evolution. The final chapter provides a "typical" configuration of an Am2900 state-machine architecture CPU. [Readers are warned, the text was based on the now very old Am2900 bit-slice series and even datasheets are now hard to come by. The methodology is, however, still valid.]


Chapter 1 is an introduction to the reasons why microprogramming should be selected as a means of implementing a control unit. This chapter also presents a discussion of language interrelationships covering topics from the typing of the conventional programmer languages to the functioning of the hardware through the microprogram. The basic concept of what a control unit does is described using a primitive CCU (computer control unit). The 2900 Family is also introduced and this bipolar bit-slice family will be used throughout the text. The concepts, however, apply to any microprogrammable system.

[Note that the advent of ASIC (application-specific integrated circuits) large enough to handle custom control applications, and now the introduction of programmable analog devices such as IMP's EPAC devices (electrically programmable analog circuit) still require the designer to understand and make use of microprogramming skills, although the concept that this is what is being done is often buried in the terminology.]


Chapter 2 begins the design evolution of a controller and introduces timing considerations. The hardware-firmware duality of the design decisions are stressed. In relation to the CCU used as an example, the concept of a mapping PROM is introduced. Only PROMs are discussed, although DEMUX networks, gate arrays, PLAs (programmable logic arrays) and PLA-type logic units are often used to perform the decode operation. Microprogram memory (control memory) is also presented. PROMs are referred to throughout the text although ROMs, PROMs, EPROMs, WCS (writeable control storage) and even parts of main memory (RAM) may serve as the control memory. Only single-level control memory is referred to in the text although some designs exist which use two-level control stores (nanoprogramming).


Chapter 3 continues the evolution of the controller adding subroutines, nested subroutines, loops and case statements to the tools available to the microprogrammer. The concept of overlapping field definitions in a microinstruction is introduced in relation to the branch-address and counter-value fields. This is an elementary form of variable formatting, the use of which should be minimized for clarity. The controller evolution leads to the microprogrammable sequencers --- the Am2909 and Am2911 --- and the next address control block, the Am29811. (The letters, A, B, C, etc. following a chip identification refers top the version available and varies over time.) [Most references in this 1981 text are for parts available at that time period.] The various versions are pin-compatible and differ in die speed and size. [Later versions are die-reduced and faster.]

The case statement introduces the Am29803A, a device which assists in implementing up to a 16-way branch.

Microprogram memory implementation is briefly discussed, introducing the use of the Am27S27 registered PROM, DC and AC loading, and the effects on sequencer timing of excessive capacitive load.


Chapter 4 continues the evolution of the CCU, introducing interrupt handling (the interrupt controller is discussed later). The interrupts are introduced here to demonstrate the OE vect requirement of the text address block. The evolution finishes with a detailed discussion of the Am2910 instructions. The instructions are discussed in their conventional usage. A number of instruction set variations are possible by tying control lines to different instruction lines (CCEN to I3, for example) and by ignoring the PL, VECT and MAP outputs of the Am2910 and driving the output enables of these devices from the pipeline register (microinstruction) itself. The Am2914 interrupt controller is covered briefly.


Chapter 5 covers the RALUS --- the Am2910 and Am2903 --- in a series of evolving steps as was done with the microsequencers. Every conceivable consideration cannot yet be treated here, but enough is presented to cover the architecture of the Am2901.


Chapter 6 covers some basic operations and presents their microcodes to demonstarte microcode selection for these devices. Two's complement multiply is covered in some detail to highlight the differences between the Am2901 and the Am2903.


Chapter 7 describes the "typical" CPU as suggested by Advanced Micro Devices for the "typical" user. It covers the Am29705 two-port RAM and the Am2904 "LSI glue" multiplexer-register support chip.


An Instructor's manual of exercises and solutions has been prepared and is [was] available from Advanced Micro Devices.


Although the text is original, many of the drawings have appeared in application notes and data sheets previously published by Advanced Micro Devices. Those application nots, written by the Bipolar Applications Department in the late 1970's and early 1980's, have served as the principal reference material.

For information about this file or to report problems in its use email dew@Donnamaie.com

Copyright © September 1996, 1999, 2001, 2002 Donnamaie E. White White Enterprises

Senior Software Engineer



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