11.7   Tasks and Functions


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11.7   Tasks and Functions

A task [Verilog LRM 10.2] is a type of procedure, called from another procedure. A task has both inputs and outputs but does not return a value. A task may call other tasks and functions. A function [Verilog LRM 10.3] is a procedure used in any expression, has at least one input, no outputs, and returns a single value. A function may not call a task. In Section 11.5 we covered all of the different Verilog procedures except for tasks and functions. Now that we have covered timing controls, we can explain the difference between tasks and functions: Tasks may contain timing controls but functions may not. The following two statements help illustrate the difference between a function and a task:

Call_A_Task_And_Wait (Input1, Input2, Output);
Result_Immediate = Call_A_Function (All_Inputs);

Functions are useful to model combinational logic (rather like a subroutine):

module F_subset_decode; reg [2:0]A, B, C, D, E, F;
initial begin A = 1; B = 0; D = 2; E = 3;
  C = subset_decode(A, B); F = subset_decode(D,E);
  ("A B C D E F"); (A,,B,,C,,D,,E,,F); end
function [2:0] subset_decode; input [2:0] a, b;
  begin if (a <= b) subset_decode = a; else subset_decode = b; end
endfunction 
endmodule
A B C D E F
1 0 0 2 3 2


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