E> 9.6 Summary

9.6  Summary

The important concepts that we covered in this chapter are:

  • Schematic entry using a cell library
  • Cells and cell instances, nets and ports
  • Bus naming, vectored instances in datapath
  • Hierarchy
  • Editing cells
  • PLD languages: ABEL, PALASM, and CUPL
  • Logic minimization
  • The functions of EDIF
  • CFI representation of design information

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DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL

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