3.9  Summary

In this chapter we covered ASIC libraries: cell design, layout, and characterization. The most important concepts that we covered in this chapter were

  • Tau, logical effort, and the prediction of delay
  • Sizes of cells, and their drive strengths
  • Cell importance
  • The difference between gate-array macros, standard cells, and datapath cells

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DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: UltraPLL

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