Logic Design for Array-Based Circuits
Copyright © 1996, 2001, 2002 Donnamaie E. White
Faults and Fault Detection
Last Edit July 22, 2001
2:1 MUX Example
Figure 9-14 shows a 2:1 MUX, its equation and its existence function. The minimal test sequence is shown in the darkened edges. The table shows the test vector (output listed first), what is tested, and what changes in each vector. Note that X3, the output, must always change, while only one input is allowed to change.
Figure 9-14 2:1 Mux Test Sequence Analysis
Figure 9-15 shows the same circuit, but this time lists both of the possible test sequences. In this case, the sequences are equal in length and coverage (100%).
Figure 9-15 Choosing A Sequence When Two Are Available