Simulation
Last Edit July 22, 2001
Parametric Simulation
Since there is a gate tree, a parametric vector set can be easily constructed
using the Minimal Test Sequence. The sequence requires that only one input
change per vector, that each input toggle in both directions and that
the output (PARAM) toggles with each vector.
Figure 83 shows a parametric vector file for a 32bit version of the
register. Sampling and format are vendorspecific, and the 100 ns step
was used. Note that the reset is executed at the beginning as it was for
the functional vectors. This will produce an error message during parametric
vector checking.
Figure 83 Parametric Simulation  32Bit
Register (partial)
Figure 83b Parametric Simulation  32Bit
Register  Full Listing
By combining the functional and parametric vectors, 100% fault coverage
is obtained for a circuit. Only sampled simulations are submitted.
Exercise
Create a complete parametric vector set for the schematics shown in the
Appendix of Chapter 3.
