Logic Design for Array-Based Circuits
Copyright © 1996, 2001, 2002 Donnamaie E. White
Last Edit July 22, 2001
The Macros and Their Options
For the bipolar arrays and for the interface portion of the BiCMOS arrays, macro selection plays a major role in the final power dissipated by the circuit.
Macros that are fast, have high fan-out drive capability or are dense (read chip-efficient) are high-current macros. The macro library should be reviewed for the existence of options or versions. A macro library may have low-power versions or options of its macros. (Note: AMCC CMOS macros have no options.)
Once the design is blocked and the macros selected, the timing requirements should be reviewed and the macros adjusted by option when options are available and can be applied.
As discussed during the chapter on timing, low-power macros are slower than the standard or high-speed options. Low-power macros may have a lower fan-out load limit. Low-power macros may have a lower maximum frequency of operation and narrower minimum pulse width. None of these variations are absolute, i.e., they vary with the array.
Macro Option Examples
The AMCC Q5000 Bipolar Series macro library has options for most of its internal macros and many of its interface macros.
The AMCC Q20000 Bipolar Series macro library also contains L-, S-, and H- options. In this series, all options have the same fan-out load limit, a function of the Turbo output feature. What is different is that some H-options use more cells than the L-and S-options. All other considerations of differences between the options remain the same.
Design Rules for Macro Options
Power-Down and Conditional Geometry - Bipolar
If a bipolar macro library is implemented with conditional geometry, macro outputs that are not used (are terminated) have their IOEF current sources shut-down. Only one version of the macro needs to be supplied in these libraries. Note that not all macros in the library allow this feature.
Terminated Outputs - Bipolar
When power-down is not allowed, the macros in the bipolar library may be available in different versions. For example three macros may perform the same function with one supplying a non-inverted Y output, one supplying an inverted YN output and one supplying both Y and YN. The macro version selected should reflect output usage.
One or two macros that are not a perfect match may not be a problem in the design but dozens of terminated yet powered-up outputs can be expensive because of the power supply and packaging options required by the higher-than-necessary power.
Terminated Outputs - BiCMOS, CMOSCMOS and internal BiCMOS macros may have their power computation based on the number of outputs switching (vendor-dependent equation). Both used and terminated outputs are counted in the computation. Therefore, for BiCMOS and CMOS arrays, the objective is to minimize the number of terminated outputs. This objective is no different from the objective for bipolar arrays.
Inverted Outputs for Distortion Management
The need for signal inversion in high-speed paths for skew and pulse distortion control may require YN (inverted output). However, there may be a different speed associated with each of the output polarities. One design objective is to maintain the timing considerations of both speed and distortion management while managing power.
Power considerations require that macros exist in a library in different versions to allow the flexibility of inversion with no additional cost in power.