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Posts Tagged ‘Synopsys’

pre-DAC 2013: TSMC certifies ATopTech, CDNS, MENT, SNPS

Thursday, May 30th, 2013


In the old days, TSMC made a big toolflow announcement every year at DAC, and hosted a lively ‘partner pavilion’ where dozens of companies were showcased in small auxiliary booths that stood in addition to their conventional booths elsewhere in the Exhibit Hall.

At DAC 2103 in Austin, however, something different is happening. Hosted by GlobalFoundries, this year’s ‘foundry pavilion’ will showcase countries, not corporations: “The DAC Global Forum celebrates contributions and future plans of nations around the globe to the field of electronic design in past (sic) 50 years.” Should be very interesting; check out Booth #137 in Austin.

In the meanwhile, TSMC’s taking this week prior to DAC 2013 to announce various tool certifications, including FinFET v0.1 design enablement: “The tool certification serves as the foundation of design infrastructure for 16-nanometer FinFET technology.”

It’s always fun to read through these types of joint announcements, at least if you’re easily amused by the exercise of comparing the quotes embedded in dueling Press Releases. TSMC Senior Director Suk Lee, for instance, is quoted in all four press releases paraphrased below, sent out this week from ATopTech, Cadence, Mentor, and Synopsys.


Paul Estrada: BDA with an ACE up its sleeve

Thursday, May 23rd, 2013


BDA chief operating office Paul Estrada has been at Berkeley Design Automation for over 7 years and is as enthused about the company today as when he first arrived. Particularly, because he says BDA is getting more attention than ever these days thanks to its growing portfolio of leading-edge products.

“We are a small business that continues to grow,” Estrada says with pride, “focusing on nanometer verification, a market where there are lots of problems, but where we are definitely making [inroads]. It’s an area that’s ripe for innovation, and better tooling, and as we don’t see the big EDA companies putting time or effort into making progress there, it’s a sweet spot in the market for us.”

Sounds great, so what’s the elevator pitch for potential customers?

Estrada responds easily: “Many companies continue to buy from our competition – principally Cadence and Synopsys – but we go into leading edge RF and analog/mixed-signal design teams and ask them what they can’t do with their current tools. They tell us and then we do those things for them with our tools. As a result, they buy even more tools from us and we go on from there.


Sanjiv Kaul: Calypto and HLS to seize the day

Thursday, May 16th, 2013


Privately-held Calypto is on quite a clip these days, with developments at the company being closely followed by the press. That’s not completely surprising given that a new CEO came on board earlier this year, Sanjiv Kaul, and a new VP of Applications Engineering was named just this week, Thomas Bollaert being promoted into that role. I had a chance to speak with CEO Kaul recently. Following is a snapshot of that conversation.


Antun Domic: in hindsight, Mead-Conway Revolution at DATE

Wednesday, May 15th, 2013


Not all of the 1600+ people who attended DATE 2013 earlier this year in Grenoble were able to fit into the room where the panel celebrating 30+ years of the Mead-Conway VLSI Revolution took place. Those who could, however, were treated to a lively 90 minutes of conversation on what that revolution meant to the world of electronics and chip design.

Organized by Synopsys’ Marco Casale-Rossi and moderated by U.C. Berkeley’s Alberto Sangiovanni-Vincentelli, panelists included Berkeley’s Jan Rabaey, IMEC’s Hugo de Man, CMP’s Bernard Courtois, Columbia University’s Luca Carloni, and  Synopsys’ Antun Domic.

Although I was among those disappointed to have missed the event, I was able to speak after the fact with Antun Domic. He described the ambiance of the SRO session in Grenoble and enumerated several of the points laid out by the panelists, starting with their praise of Lynn Conway and Carver Mead’s ground breaking text book, published in 1980, Introduction to VLSI Systems.


EDPS 2013: surf, sand, serenity, semiconductors

Thursday, April 4th, 2013


Let’s be honest about this. The reason the Electronic Design Process Symposium takes place every year in Monterey is because of the surf and sunshine. Otherwise, this conference would be so much more appropriately located in Silicon Valley.

Oh well, where’s the harm? Just hop into your favorite woodie, be it a hybrid or an EV, don’t forget the suncream, sandtoys, and surfboard, and head on down to Monterey Bay for two days of great talks, good food, and quiet-ish contemplation, with an emphasis on -ish. The 20th annual EDPS awaits.


DAC 2013: Innovation Square

Thursday, March 21st, 2013


It’s time to start exploring what’s coming up at DAC 2013 in Austin the first week in June, and one way to do that is to visit the conference website. There you’ll find a variety of interesting things including an interactive Exhibit Hall map, which allows you to run your mouse over any booth and see which company’s going to be located there. Maybe that feature’s been available in years past, but it’s still pretty cool.

Something that certainly is new this year at DAC, however, is Innovation Square. I’ve boldly cut-and-pasted the graphic from the DAC website into this blog so you can see what it entails, which is this: You pay the DAC organization $5500 and for that you get a kiosk-like space, a 24-inch computer monitor, an electrical hook-up for your other stuff, booth-unit graphics, a shared private meeting suite with a schedule that you’ll know in advance, and one paid-in-full conference registration.

In other words, you get a “turn key package” that allows you to have a foot on the ground at DAC without enduring the mystery of “What’s this all going to actually cost me?” True, it looks like any particular company in Innovation Square only has about 15 or 20 square feet of show floor, but if otherwise you couldn’t afford to be on the show floor at all in Austin, this is a great innovation indeed.


EDAC CEO Panel: Practically perfection

Thursday, March 14th, 2013


From the podium in San Jose’s DoubleTree Hotel, Jasper Design Automation President & CEO Kathryn Kranen introduced tonight’s EDAC CEO Forecast Event as being “practically perfection” and she was right. With 97 people in the room, the event ran for 97 minutes and the audience [undoubtedly] gave the panel discussion a 97% approval rating. Kudos to all involved, including EDAC for hosting, and OCP-IP, Mod Marketing, and the DoubleTree for sponsoring the event.

Kranen started off the evening by bragging on good news out of EDA: It’s up and to the right for revenue in the industry, with a 4.9 percent increase between 3Q11 and 3Q12. She cited increased stock valuations over the last year for ARM [37%], Cadence [30%], Mentor [26%], PDF Solutions [98%], and Synopsys [17%] as an indication of the viability of EDA as an investment vehicle: If you’d put $100 into each of these companies a year ago, she said, you would have netted a 41% increase in a portfolio today worth $706.90, beating out other investment indices such as the NASDAQ and S&P 100 over the same time period.


Great Circle: from ISQED to DATE

Thursday, March 7th, 2013


If you were lucky enough to be at the ISQED Poster Session in Silicon Valley on Tuesday afternoon, March 5th, you had a chance to speak with various university students presenting novel work, various industry researchers presenting new ideas, and Chi-Foon Chan, Co-CEO of Synopsys, whose long involvement with ISQED, and deep and abiding interest in the underlying technology, fueled lively conversations as he too visited posters being presented by academia and industry alike.

As well, you would have had a chance to speak with Prof. Daniela De Venuto from the Politecnico di Bari. She told me about her research into implanted devices which monitor rate of chemical absorption in the digestive tract, and ways in which the resulting data could impact our understanding of the biochemistry of drug delivery mechanisms.

She also told me about various fascinating sessions at the upcoming DATE 2013 conference in Grenoble, starting on March 18th. These sessions are of particular merit for anyone interested in the interface between biological systems, electronic systems, environmental systems, and all manner of collaborative research embracing them all.

On March 21st, Prof. De Venuto is chairing a session on Smart Health along with U.C. Berkeley Prof. Alberto Sangiovanni-Vincentelli. The session is part of a Special Day on Electronic Technologies for Smart Cities.


DVCon 2013: There is such a thing as a free lunch!

Thursday, February 21st, 2013


You may think it’s a cliché, but it turns out there is such a thing as a free lunch at DVCon 2013 from February 25th to 28th at the DoubleTree in Santa Clara.

If you attend all 4 days of the conference, you will be the guest of the Accellera Systems Initiative, Mentor Graphics, Cadence, and Synopsys on Monday, Tuesday, Wednesday, and Thursday, respectively. More important than the food, however, is the exposure to the learning — albeit with a heavy dollop of company messaging on top. You should be there.


DAC 2013: Zorian’s powers in Austin

Wednesday, January 16th, 2013


There are three reasons why DAC will be spectacular come June in Austin: It’s the 50th instantiation of the conference; for the first time ever DAC is coming to the home of Office Space; and Synopsys Solutions Group Chief Architect Yervant Zorian will be General Chair, which means the 2013 Design Automation Conference has got the very best in the business at the top, a guy who’s CV includes leading committees of all shapes and sizes, IEEE Standards initiatives, and a variety of conferences, big and small.

Zorian’s track record in the industry is well known. My own article, Yervant Zorian: Grand Master of Time Management, was published on the DAC website in 2007. But all that said, it’s a personal recollection of Yervant Zorian that I prefer.

In 1999, I was tasked with writing my first Focus Report for ISD Magazine, a now-defunct publication of Miller Freeman CMP UBM, on the subject of DFT, Design for Test. Tets Maniwa was Editor in Chief of the magazine at the time and he suggested that I call Yervant Zorian for some technical background on DFT, BIST, and all that jazz.


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