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Posts Tagged ‘Sigrity’

Cadence: The Best of Times

Thursday, November 30th, 2017

 


Of all the stories associated with Cadence Design Systems
, the saga of Lip-Bu Tan might be considered the most unlikely. After all, this is the company that launched one of the most flamboyant CEOs in the history of EDA, followed by one of the most outspoken, then one of the least prepared given his non-tech provenance, and finally one of the most distinctly over-paid in the history of the industry and Silicon Valley.

And all of that even before the corporate cataclysm of 2008. Few at the company in the fall of that year may have noticed the economy teetering on a cliff, because they were too busy tracking unbelievable developments within their own firewall.

On October 15, 2008, a thorough house-cleaning gutted the executive suite: The CEO, all EVPs, and a smattering of others were out, leaving the company leaderless and without an apparent rudder. Instantly the company stock tanked and more than a dozen shareholder lawsuits erupted from that special place from whence such things spring as spontaneously as lawyers after an ambulance.

Into this chaos stepped Lip-Bu Tan. Admittedly, he was no stranger to Cadence having been on the board for several years at that point, but was neither chairman like Stanford’s John Shoven, nor an EDA household name like Berkeley’s Alberto Sangiovanni-Vincentelli.

Also surprising: On paper Tan looked more quintessential VC than quintessential CEO, given his track record founding and managing Walden International’s $2 billion investment portfolio. Nonetheless, it was Lip-Bu Tan’s name that suddenly appeared in the press releases announcing the new Interim CEO.

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Innovation: does Voltus prove CDNS still has what it takes?

Thursday, November 14th, 2013

 

Cadence is announcing this week a new product for power integrity and signoff called Voltus, which the company says solves several problems simultaneously.

Per a phone call with Cadence Director KT Moore, one of the challenges in power signoff is that it takes a lot of time: “When designers look at analyzing power for the block, chip or package, current analysis techniques can literally take days, so designers are looking for a faster solution. What Cadence believes to be true about Voltus is that this product is 10x faster than any existing solutions available today. Because of that, we know the customers are very excited.”

“The other issue with power signoff,” Moore said, “is that it needs to be accurate. You can make a product a thousand times faster, but it’s of little value if it’s not accurate. With Voltus, however, we’re maintaining the same accuracy compared, for instance, to Spice or whatever the customer’s expectation reference is. But there’s an additional level of accuracy in Voltus that’s also important.

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SI: What comes after CDNS acquires Sigrity?

Thursday, July 5th, 2012

 

The SI landscape is a confusing one: What is the true value of a signal integrity analysis tool, and if you’re an EDA vendor, do you need to offer an in-house SI solution to be a true end-to-end provider?

Although Cadence has had a position in signal integrity with their OrCAD Signal Explorer [pre- and post-route topology exploration and transmission line analysis, conceptual, pre-design/schematic topology exploration and simulation, routed or unrouted board topology extraction and analysis] …

… this week Cadence announced it has acquired Silicon Valley-based Sigrity and will now incorporate Sigrity’s PowerSI [full-wave electrical analysis for IC packages and PCBs, identifies trace and via coupling, power/ground bounce, and design regions that are under or over voltage targets] and SystemSI [chip-to-chip signal integrity analysis, including parallel bus analysis and serial link analysis, frequency domain, time domain and statistical analysis] into Cadence’s flow.

This all sounds great as a strategy for beefing up Cadence’s SI offerings, but what does it do to Sigrity’s current set of partners: Apache [owned by Ansys], CST, Mentor Graphics, Synopsys’ HSPICE, TSMC, and Zuken?

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CST: Webinar series



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