Posts Tagged ‘Moore’s Law’
Thursday, September 28th, 2017
Vic Kulkarni is well-known in the EDA community as co-Founder, CEO and President of Sequence Design from 1995 until the company merged with Apache in 2009, which in turn was acquired by ANSYS in 2011. Kulkarni is now VP and Chief Strategist in the Office of CTO for the Semiconductor Business Unit at ANSYS.
There is little Kulkarni has not seen in his 30+ years in Silicon Valley. Although our conversation here mostly highlights current successes at ANSYS, it’s clear he continues to be wildly enthused about the broader promises of technology and the exciting efforts underway to create tools and strategies to bring those promises to fruition. Vik Kulkarni’s enthusiasm is the kind of thing that continues to make this industry so vibrant, and makes careers herein appealing for the next generation of engineers.
Thursday, September 7th, 2017
John Kibarian has been involved with PDF Solutions since co-founding the company in 1991 in Pittsburgh, through its relocation to California in 1996, through the IPO in 2001, and on into today. He’s been CEO since 2000. PDF Co-founder Kimon Michaels has also been with the company since the beginning, and currently serves as VP of Products and Solutions.
As well, CMU Professor Andrzej Strojwas [2016 Phil Kaufman Award recipient] has been PDF’s Chief Technical Advisor from the beginning — not surprising considering he served as Kibarian’s PhD thesis adviser at CMU — and Lucio Lanza has been on the board of directors for 20 years, serving as Chairman since 2004.
PDF is a company that defines stability, steady growth, and an intellectually rigorous and serious-minded approach to solving problems. It’s not a company of self-promoters or grand-standers. It’s a company of highly accomplished technologists, deeply involved in one of the toughest jobs in semiconductors: Finding out why chip yields are good, bad or ugly, and figuring out how that data might be used to improve design and manufacturing.
The last time I interviewed John Kibarian, it was 2015 and PDF Solutions had just acquired Syntricity a company with yield-improvement technology and services for the IC process life cycle.
This time when Kibarian and I spoke, PDF had just acquired several assets of Kinesys Software, including its ALPS (Assembly Line Production Supervisor) software, “designed to enable complete manufacturing traceability, including individual devices and substrates, through the entire assembly and packaging processes” – capabilities which PDF plans to integrate with their Exensio big data analytics platform.
Thursday, September 29th, 2016
Dr. Andrzej J. Strojwas, professor of Electrical and Computer Engineering at Carnegie Mellon University, has been named recipient of the 2016 Phil Kaufman Award for Distinguished Contributions to Electronic System Design.
Interestingly, this is the first year that the Kaufman award is being presented for contributions to Electronic System Design, not EDA. Very appropriate given that Strojwas’ contributions are in manufacturing and not design. Prof. Stojwas is CTO at PDF Solutions, which per company CEO John Kibarian has never been an EDA company. And with Kibarian serving as co-chair of the ESD Alliance, the organization formerly known as EDAC has now fully embraced its role across the entirety of electronic system design.
Besides this nod to EDAC’s ongoing evolution, the larger implications in CEDA and the ESD Alliance naming Andrzej Strojwas as this year’s Kaufman recipient are profound: The problems associated with electronic systems are not so much in the design these days, but in the extraordinary difficulties associated with manufacturing those designs. It’s really tough, as you all know, when the structures being manufactured are smaller than the wavelengths of light used to etch them.
Which bring us back to Dr. Strojwas. He has been CTO at PDF for 20 years. Back in the last century/millennium, the problems of manufacturing below 193 nanometers could only have been guessed at, yet the company was already working on the intriguing issues of capturing post-manufacturing data and somehow packaging it up to make it useful: How does the semiconductor supply chain glean vital information about the vagaries of manufacturing a real chip and send it back up to the designers so they can learn from the reality when they put pen to paper to design the next hypothetical?
This engineering of the engineering demands scientific curiosity, steely eyed attitudes towards the realities of physics and material science, and a large dollop of business savvy to navigate between the needs and demands of the foundries and the needs and demands of the designers. Let’s allow Dr. Strojwas to take it from here. We spoke by phone this week after his award was announced.
Wednesday, April 22nd, 2015
If there’s something missing in your personal or professional knowledge of Moore’s Law, you should have spent 5 hours at the Computer History Museum in Mountain View on April 17, 2015, although even then you might not have learned anything new. For people in technology, seriously, what more is there to know?
The ‘law’, penned by Gordon Moore and published in an Electronics article on April 19, 1965, was based on his many years’ experience in the nascent-to-ferocious semiconductor industry, and has since been interpreted, re-interpreted, mis-interpreted, and zealously lionized – both the law and the man – over the last 50 years. Which brings us back to April 17th and the 3-part program at the CHM.
Thursday, April 17th, 2014
Overlooking the inky calm of Monterey Bay, the lights of tethered boats in the marina reflecting in the shimmering waters below, Wally Rhines delivered a mesmerizing after-dinner keynote on Thursday night, a gift to an intimate group of EDPS attendees assembled in the low-slung Monterey Bay Yacht Club adjacent to the municipal pier.
It was textbook Rhines: a detailed re-telling of the last 50 years of the semiconductor industry with a log-log analysis of the validity of various versions of Moore’s Law, a dizzying display of data on shrinking feature sizes, and an adamant admonition that the law is, in fact, an economic learning curve with applicability that extends beyond the narrow confines of electronics.
From there, Rhines talked at length about what constitutes a process node, the gulf between Engineering’s obsession with gate length and Marketing’s obsession with world domination, and how reality got so out of whack with message that in recent years the ITRS had to step in and put an end to a war of claim versus counter-claim. Nonetheless, per Rhines, one company’s 16nm today is another company’s 14nm, as the murky physics behind the labels obfuscates to confuse the customer and confound the competition.
But the real core of Rhines’ talk was still to come: He addressed the issue of margins, head-on, across the entire spectrum of the semiconductor food chain, one micro-segment at a time. To do this to completion required many more charts, extensive additional analysis, and a lot more time. Yet, even as the hands of the clock over the bar inched well past 9 pm, no one in the room budged, yawned, or dozed – so complete was Rhines’ mastery of the material and command of the context. It was brilliant.