Posts Tagged ‘DVCon’
Thursday, October 26th, 2017
Dr. Philippe Faes and Dr. Hendrick Eeckhaut together founded Sigasi in 2008. Since that time, Belgium-based Sigasi has accomplished the impossible: Taking the best elements of software design and applying them to hardware design. The Sigasi Studio IDE takes the type of feature-rich development environment that facilitates software design and redefines it for hardware design.
Early one morning last week, I spoke by phone with Hendrick Eekhaut, who serves as CTO at Sigasi. He was in Belgium, I was in California. After our conversation, he headed out to dinner; I headed in for breakfast.
Thursday, February 23rd, 2017
Accellera has just announced that Lu Dai, Senior Director of Engineering at Qualcomm, is the new chair of the organization.
Although Intel’s Shishpal Rawat, recently retired from Intel, is a hard act to follow as Accellera Chair given his long, productive years leading the organization, if anyone can do it Lu Dai can. He’s enthusiastic, energetic, optimistic, and an engineer – and not necessarily in that order.
Before talking about Accellera in our phone call this week, Dai spoke about DVCon, anchor tenant of Accellera’s outreach to design and verification engineers around the world. This next week, the Silicon Valley version will unfold in San Jose, with DVCon India happening in September, DVCon Europe in October, and the first-ever DVCon China in April.
Thursday, December 15th, 2016
The New Year promises to be a dramatic one on many fronts, not the least being the ever-quickening pace of change in technology. Evidenced by the continued and enthusiastic attendance at conferences around the world, there are clearly so many opportunities to network, learn, and develop sales leads at these events. Bets are on that you’ll be attending at least one of these. Happy New Year!
* CES2017: Consumer Electronics Show – January 5-8 – Las Vegas
No one need tell you what CES encompasses: Here in its 50th annual edition, it will include everything. The 2017 keynotes will include addresses from the CEOs of Qualcomm, Huawai, Nissan Motors, and Nvidia. But the topics covered in this massive 100,000-attendee show will cover cars, wearables, healthcare devices, and every conceivable type of consumer clutter.
Thursday, July 14th, 2016
Intel’s Shishpal Rawat has been Chair of Accellera for 6 years and is currently serving as President of CEDA, IEEE’s Council on Electronic Design Automation. In previous discussions, Rawat has insisted that his leadership is not what makes these organizations work. Only the enthusiastic efforts of the many members guarantee that both Accellera and CEDA continue to shape ideas, standards, and forward progress within design automation and its adjacent technologies.
Two years ago, I enjoyed a lengthy interview with Rawat about all of this, described here. This year, I’ve chatted with Rawat at DVCon in San Jose in March, and again by phone just prior to DAC in June. During the phone call, Rawat focused on CEDA’s activities at DAC in Austin. He told me the upcoming Sunday night panel, set to be moderated by SRC’s Bill Joyner on June 5th, was a new and very exciting addition to the DAC program.
Thursday, March 17th, 2016
Mentor Graphics’ Tom Fitzpatrick gave a lunchtime talk at DVCon several weeks ago summarizing recent efforts to build a standard [set of standards?] around portable stimulus for verification. The room was packed with over 200 people and his talk was sufficiently complete, nobody asked any questions.
After his presentation, however, I did hear some comments. Namely that these types of standards are quite complex and difficult to develop. Hence, setting an actual delivery date of January 2017 for Portable Stimulus Standard Version 1 [PSS V1] is quite aggressive and optimistic.
I was not fully informed about Accellera’s Portable Stimulus Working Group [PSWG] prior to Fitzpatrick’s talk, so could not judge whether January 2017 is or is not overly optimistic as a delivery date for the standard. Since DVCon, I have studied the slides and attempted to better understand what this is all about: What is a Portable stimulus and what would a set of standards look like?
Thursday, March 10th, 2016
You would probably have learned more about Ajoy Bose by reading his biography than by attending Jim Hogan’s gentle exercise in collegiality on Tuesday night, March 1st, in Silicon Valley. The conversation between these two giants of EDA, hosted by EDAC as part of DVCon week, was consistently unstructured, whimsical and seemingly without outline.
The next day, I sat in a coffee shop and struggled to find a handle with which to write a coherent summary of the previous night’s random access memory album. But that handle would not reveal itself.
Then I happened to glance over to a nearby table where another caffeine addict was buried in a book: The Man Behind the Microchip. I asked the addict who exactly was the subject of the book and the answer came back: Robert Noyce.
So Robert Noyce is the man behind the microchip, I pondered. The only man behind the microchip? Like Steve Jobs invented the iPod/iPad/iPhone? Or Thomas Edison invented the electric light?
No wonder, I realized, it was hard to get a handle on the previous night’s Hogan/Bose interview. They didn’t do anything. Robert Noyce did it all. And without help. Hogan and Bose did nothing, and ergo had nothing to offer their audience.
These two were not part of a vast conspiracy of contributors, all adding their particular drips and drops of innovation into the trickle of technology, that rolled into a small creek of creativity, that ran into a moderate-sized stream of science-turned-engineering, which poured into a roaring river of real change, which crashed into a seething sea of twenty-first century digital life.
Of course, that’s nonsense. Robert Noyce did not do everything, and Hogan and Bose did not do nothing.
Wednesday, February 24th, 2016
Emulation is everything in verification today and therefore at the center of DVCon. Technology expert, Lauro Rizzatti, has prepared this brief tutorial for you, so you’ll be ready for the conference that starts on February 29th.
* The Past
Hardware emulation has been around for 3 decades. It started in the mid 80s with pioneers like Quickturn and Ikos, who used off-the-shelf FPGAs in the fabric of their emulators. The second decade saw the rise of several startups, some of them using custom silicon devices in the emulators.
Wednesday, February 10th, 2016
Sometimes you just gotta wonder what happens behind the closed doors of the executive suite. Last June, when Synopsys acquired Atrenta, Atrenta’s founder – a distinguished technologist, alum of IIT Kanpur, UT Austin, Bell Labs, Cadence and Interra, and profoundly well-seasoned EDA leader – closed the door on his leadership role at the company he founded 14 years before.
I will admit, I do not know if Dr. Ajoy Bose actually ever reported to duty at Synopsys last summer – the received wisdom would have us believe he needed to set foot there long enough to help his team transition into the Big Purple – but in truth, it is hard to imagine him ever playing second fiddle to Dr. Aart de Geus or Dr. Chi-Foon Chan, or anyone else for that matter. He is a man of that much dignity and gravitas.
Of course, if Bose did punch a time clock at Synopsys, it was for nary a nanosecond in geologic time. It’s been 9 months since the acquisition and now Bose is clearly free to speak in public about the past, present and future of the industry he has helped to create. That surely would not be happening if Bose was just a node in the org chart that has Chan and de Geus at the top of the pyramid.
So there’s one half of the good news included herein.
Thursday, March 5th, 2015
What if I were to tell you that I attended a conference where people were really excited to be there, where the exhibit hall was filled with a crush of people making their way from booth to booth, talking with exhibitors and exchanging business cards madly. A conference where the South of the exhibit hall was dominated by Synopsys, the East by Cadence, and the West by Mentor, and where at the happiest hour, libations and snacks flowed freely in a sub-set of the booths and the whole exhibit hall became even more animated.
What if I told you the technical portion of the conference included a variety of content — touching at times on autos, wearables, the IoT, IP, standards, and verification — excellent panel discussions, well-attended poster sessions, detailed tutorials, and a keynote from the CEO of the largest company in the industry delivered to a packed, SRO ballroom full of designers, engineers, and engineering managers.
Finally, what if I told you the highly capable staff of MP Associates was running the whole thing with their usual aplomb, attending to details as diverse as registration, sound systems, lunch tickets, speaker logistics, and awards presentations.
Thursday, September 25th, 2014
Last week I had a chance to chat by phone with Accellera Chair Shishpal Rawat, and when I say chance that’s accurate. Rawat is so busy these days, it’s hard to believe he has time for any extraneous conversations. Not only does he have a full-time job at Intel, he has been chair of Accellera for four years and now is ramping up to take over the reins at CEDA at well.
Among other activities, both Accellera and CEDA sponsor several key conferences in the industry. Accellera is the primary sponsor of the Design and Verification Conference and Exhibition (DVCon). I asked Shishpal about this year’s efforts to take DVCon on the road and how that dovetails with the changes he’s seen at Accellera over his years of leadership.
He said, “Without a doubt, the biggest change is the international outreach that we are now doing in our programs. DVCon will debut in Bangalore this month and will debut in Europe next month on October 14th and 15th in Munich. Expanding the conference this way has required a great deal of work on the part of local dedicated volunteers in both India and Europe, in addition to the efforts of our established corps of hardworking people. We expect a very big group of attendees at both of these shows, which adds to the work load for everyone involved.”