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Posts Tagged ‘Chenming Hu’

The Dictates of Fate: Andrzej Strojwas receives 2016 Kaufman Award

Thursday, September 29th, 2016

 


Dr. Andrzej J. Strojwas
, professor of Electrical and Computer Engineering at Carnegie Mellon University, has been named recipient of the 2016 Phil Kaufman Award for Distinguished Contributions to Electronic System Design.

Interestingly, this is the first year that the Kaufman award is being presented for contributions to Electronic System Design, not EDA. Very appropriate given that Strojwas’ contributions are in manufacturing and not design. Prof. Stojwas is CTO at PDF Solutions, which per company CEO John Kibarian has never been an EDA company. And with Kibarian serving as co-chair of the ESD Alliance, the organization formerly known as EDAC has now fully embraced its role across the entirety of electronic system design.

Besides this nod to EDAC’s ongoing evolution, the larger implications in CEDA and the ESD Alliance naming Andrzej Strojwas as this year’s Kaufman recipient are profound: The problems associated with electronic systems are not so much in the design these days, but in the extraordinary difficulties associated with manufacturing those designs. It’s really tough, as you all know, when the structures being manufactured are smaller than the wavelengths of light used to etch them.

Which bring us back to Dr. Strojwas. He has been CTO at PDF for 20 years. Back in the last century/millennium, the problems of manufacturing below 193 nanometers could only have been guessed at, yet the company was already working on the intriguing issues of capturing post-manufacturing data and somehow packaging it up to make it useful: How does the semiconductor supply chain glean vital information about the vagaries of manufacturing a real chip and send it back up to the designers so they can learn from the reality when they put pen to paper to design the next hypothetical?

This engineering of the engineering demands scientific curiosity, steely eyed attitudes towards the realities of physics and material science, and a large dollop of business savvy to navigate between the needs and demands of the foundries and the needs and demands of the designers. Let’s allow Dr. Strojwas to take it from here. We spoke by phone this week after his award was announced.

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ProPlus’ CTO: Intelligence in Design Personified

Thursday, April 24th, 2014

 

Talking to ProPlus Design Solutions requires a long view of history over at least the last 20 years in EDA. In 1993, BTA, an EDA company focused on device model extraction and SPICE simulation, was founded with U.C. Berkeley’s Dr. Chenming Hu as Chairman of the Board. In 1999, BTA merged with Ultima, and became Celestry in 2001.

Finally, in 2003, the combined companies were acquired by Cadence Design Systems. Then in 2007, a new company called ProPlus was spun out of Cadence to support the original BSIMProPlus device modeling platform with roots going back to BTA/Celestry.

Current ProPlus CTO Bruce McGaughy earned his PhD at Cal with Chenming Hu as his advisor, served at both BTA and Celestry, and worked at Cadence, before joining ProPlus 6 years ago. I had a chance to talk with Dr. McGaughy in person last month in Silicon Valley. Our conversation covered a range of topics.

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EDAC Gala: Channeling our inner angels

Thursday, October 10th, 2013

 

Given that history and innovation are being featured here in this space this week, it’s only appropriate to highlight the fact that EDAC is hosting a very interesting event related to history and innovation in Silicon Valley next week.

On Wednesday, October 16th, those who have made massive contributions to the EDA industry will be highlighted and celebrated at a black-tie optional dinner at the Computer History Museum. If you’re interested in rubbing elbows with the powerful and prolific, you should be going to this event. If you want a chance to bid at auction for lunch with today’s corporate leaders in EDA, you should be going to this event. If you think said corporate leaders make enough money to pay for your lunch, rather than vice versa, you should still be going to this event.

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Herb Reiter: The three-legged stool of Technology Choices

Thursday, September 5th, 2013

 

Herb Reiter, founder and president of eda2asic, has been in the semiconductor and EDA industry for 30+ years, including stints at Barcelona Design, Viewlogic, Synopsys, VLSI Technology, and National Semiconductor. In the last few years, Reiter’s work has focused on SOI, 2.5/3D ICs, and FinFET topics in semiconductor design and manufacturing. Straightforward enough, until you realize that these are significantly different ‘3D’ technologies, where ‘3D’ means different things to different people.

In a recent phone call, I asked Reiter to distinguish between what he calls the “three legs” of technology choices and to weigh in on which “leg” is most likely to succeed.

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Fully-depleted SOI …

Per Reiter, “The original technology was partially-depleted SOI, a fairly thin film of silicon on top of a thin insulating layer. IBM came up with the idea, because substrate capacitance was slowing their chips down. They realized if they put in the insulating layer, they wouldn’t have to worry about substrate capacitance, because the oxide layer would insulate things.

“The planar transistor gate cannot reach all of the electrons in an 80-nanometer channel, cannot fully control the flow, and causes what we called ‘body-effect’ and ‘kink-effect’ design challenges. That’s why partially-depleted SOI was not widely used. So fully-depleted silicon on insulator, FDSOI, was introduced. It only has about a 20-nanometer active film on top of the oxide layer. The gate is sitting on top of the active film and can control all of the electrons passing through the source/drain channel, which is why it’s called fully-depleted SOI.

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DAC 2013: Top 10 from Day 1 in Austin

Monday, June 3rd, 2013

 

The Design Automation Conference is mostly about People who need People, so my Top Ten list from Day 1 in Austin here at the 50th DAC is about just that: The Luckiest People in the World.


No. 10)
Rushing up to Room 18 on Level 4 of the Austin Convention Center to attend the DFM&Y Workshop at 9 am, only to find that I couldn’t get in because I hadn’t paid. Why is this disappointment on the list of favorites?

Because on my way back down to Level 1, I ran into Jill Jacbos who’s been working overtime here in Austin on behalf of Accellera Systems Initiative (Stan Krolikoski received the 2013 Leadership Award at the 7 am breakfast today), the North American SystemC Users Group Meeting (taking place all day today on Level 3), and Jim Hogans’ Hot Zone Party tonight at Austin City Limit’s Moody Theater.

Jim’s efforts, and those of the folks helping him, are all to raise money for his Heart of Technology charity, which is donating funds raised in Austin to CASA (Court Appointed Special Advocates) of Travis County, Texas. If you want to donate, you can do so at Jim’s website.

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DAC 2013: Three marvelous awards in Austin

Wednesday, April 24th, 2013

 

If you’ve been on the fence about coming to the Design Automation Conference in June, hesitate no longer. There will be wonderful things to see there, and marvelous accomplishments to celebrate. At least three awards set to be presented in Austin will go to individuals who have contributed significantly to innovations and energies in the industry, each award being given in the name of a noted role model whose own contributions have pushed the envelope of the industry forward.

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2013 Kaufman Award: U.C. Berkeley’s Chenming Hu

Wednesday, April 3rd, 2013

 

The EDA Consortium and the IEEE Council of EDA together announced today the recipient of this year’s Phil Kaufman Award for distinguished contributions to EDA – Chenming Hu, TSMC Distinguished Professor of the Graduate School at U.C. Berkeley.

Per the Press Release: “Dr. Chenming Hu is being recognized for his contributions in device physics, device modeling, and device reliability through BSIM and BERT models that have transformed the semiconductor manufacturing and EDA industries. Dr. Hu’s team invented the revolutionary 3D finFET transistor structure that simultaneously achieves size and power reduction to enable continued scaling of the microelectronic chips.”

Prof. Hu is a marvelous choice on the part of both EDAC and CEDA, but it is important to note that his contributions in EDA are the basis for the Phil Kaufman Award, not his work on the finFET – even though the latter is the hot topic in semiconductors today.

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Vertigo: funFITs or fudFITs into finFETS?

Thursday, March 28th, 2013

 

To say this is the year of the finFET is somewhat of an understatement, because everywhere you go somebody’s talking about going up instead of out – at ISSCC, at DesignCon, at DVCon, at ISQED, at SNUG, at EDPS, at DAC.

Among the talks so far, one of the best was given by the father of the finFET himself, U.C. Berkeley’s Chenming Hu. If you were at ISQED in Santa Clara on March 5th, you heard Prof. Hu describe how increasing leakage current in planar devices motivated radical new thinking in the late 1990s: Instead of a classic source, drain, gate structure, take a thin film of high-quality silicon material, place gate-dielectric above and below it such that the silicon is never very far from the gate, and then turn the thing 90 degrees so that the source is out the back, the drain’s in front, and the gate material is vertical.

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Chenming Hu: Looking at life from both sides now

Thursday, January 3rd, 2013

 

Last night, Judy Collins gave a holiday concert at Davies Hall in San Francisco to a sold-out crowd of acolytes. Only an artist of Collins’ fame would be allowed to ofttimes warble off-key, forget the occasional lyric, and natter on in and around the music, yet still receive a standing ovation. After all, at 73 she is still full of performing fire, still full of attitude and life. Her appearance at Davies was a celebration of that life, lived to the fullest and in many different spheres.

Last week, U.C. Berkeley’s EECS Department threw a birthday party/symposium for Chenming Hu in Sutardja Dai Hall for an SRO crowd of past students, present students and acolytes, friends and family. Only an educator and technologist of Hu’s stature – former CTO of TSMC, ‘father’ of the FinFET, ‘godfather’ of BSIM and an international expert on CMOS device models – would be honored thusly in his 65th year by the University, and allowed to hand pick the list of speakers who filled the day-long event.

Not the least among those chosen was Ramune Nagisetty, a former MSEE student of Hu’s, who now leads a team at Intel/Hillsboro. Nagisetty recently added self-taught guitarist and vocalist/lyricist to her CV, and no matter that she ofttimes warbled off-key during her lunchtime and mid-afternoon performances during the symposium, and nattered on in and around her music, she still received a jumped-to-their-feet ovation from Hu et al.

That’s because Nagisetty was just one part of the evidence offered on December 13th – talks, demonstrations, and performances – to prove that Chenming Hu’s life to date has been lived to the fullest and in many different spheres: His family was in attendance to celebrate with the crowd, Hu’s paintings, and those of his wife and sons, were on display in the lobby outside Banatao Auditorium, Nagisetty’s music was presented, and a remarkable group of technologists as diverse as …

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