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Posts Tagged ‘Cadence’

PCB Tools, Part 2: Request for info

Thursday, September 22nd, 2016


Last year a blog was posted in this space talking about tools for PCB design
: PCB Tools, Part 1: Zuken, Mentor, Cadence, Altium. Lengthy and detailed, that discussion included commentary on the state of the art, and the market, for PCB design tools.

Now it’s time to assemble Part 2 of the discussion, which will be posted here in early November. This second installment intends to include input from more than just the four companies in the first article.

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Dancing Queens: Armstrong Kendall & The Soul of EDA

Wednesday, September 7th, 2016

 


Nothing is forever in life, most things are fleeting.
And such is certainly the case for the giddy, glory days of EDA at the end of the last millennium when the likes of Abbie Kendall and Jean Armstrong ran the show — the PR show, that is, for Cadence at the height of the Ray Bingham Era.

The DAC of 1999 has already been memorialized here, in and around an homage to the late, great Marie Pistilli – but the DAC of 2000, at least the Cadence version, was even grander.

The night Cadence took their Press & Analyst constituency out on the town in June of 2000 was almost beyond belief. Remember that something like 11,000 hearty souls were on board in Los Angeles for DAC that year, the conference ramping up for the week at Staples Center just as the previous week’s Exotic Erotica Show was winding down. How appropriate.

Big money was flowing everywhere within the EDA ecosystem and the Big Players needed to demonstrate in the showiest way possible that theirs was the one that was going to dominate the next decade, theirs was the enterprise that was going to win the war.

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SNPS & OneSpin: Saving for Rainy Day not always Best

Thursday, August 18th, 2016

 


As of August 17th, when they posted financial results for Q3_2016
, Synopsys is reporting somewhere in the neighborhood of $1 billion in cash and cash equivalents. As prudent as it may be to save for a rainy day, here’s something a bit more creative the company could do with a portion of that cash: Buy OneSpin.

Why? Because OneSpin offers something that Synopsys doesn’t have – a market-leading position in formal verification. OneSpin would bring that to Synopsys, along with a strong, well-established track record and proven customer engagements across European, North American and Asian markets.

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Mark Gilbert: White coat, White hat, Big fish

Thursday, June 30th, 2016

 


Exuberance and Optimism:
the only two words required to describe EDA-Careers’ Mark Gilbert – even after 20 years in the trenches sorting out the who what and where of just about everybody in the EDA industry. Yes, he self-identifies as the fun guy in the white suit, seen hither and yon wherever the EDA Nation chooses to confab, but in reality he’s the good guy in the white hat who’s going to tell it to you straight, about your career and your goals.

Also by his own description, Mark Gilbert is “the big fish in a little pond” who serves as the leading head hunter and career counselor extraordinaire of EDA.

I was lucky enough to speak with Gilbert by phone this week. As he and I were both on the East Coast, coordinating the hour of the call was easy. Our conversation started with the usual query: How did you get started in this business?

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Verific: Rhymes with Terrific

Thursday, June 23rd, 2016

 


Michiel Ligthart
, President and COO of Verific Design Automation, and Rick Carlson, VP of Worldwide Sales, have a proposal for young companies in the EDA industry and adjacent technologies: Come to Verific if your organization is early stage, in need of encouragement and wise counsel, and could benefit from access to Verific software to help you progress towards a commercial product launch.

In a recent phone call, Ligthart and Carlson explained the specifics of the Verific program, and delineated what it’s not: “We are not funding startups,” Ligthart said, “but we have changed our business model over the lifetime of our company to encourage innovation.

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Executive Privilege: Presidential Libraries at DAC, LBJ to AdG

Wednesday, June 15th, 2016

 


Presidents and CEOs share a common difficulty: the past
. A past that’s sometimes of their own making. They come into office full of enthusiasm and an agenda for improvement and innovation, only to find that the past serves increasingly as an impediment for moving forward.

Of course, the difference between Presidents and CEOs is that the former get libraries built in their name to commemorate their contributions, whether or not they’re able to conquer a past legacy left to them by predecessors.

CEOs, on the other hand, don’t get libraries when their tenures end. They either get tons of criticism, or occasionally tons of praise – but no library. They do, however, often get millions of dollars in compensation and stock during their administrations, and usually a pretty golden handshake when they’re done. Something that goes a long way to easing the pain of criticisms they may endure during and after their years in power.

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Silexica: Holy Grail for Multi-core

Thursday, May 12th, 2016

 


Aachen-based Silexica is making waves in the world of multi-core and embedded systems
, as evidenced by their recent win in the German Silicon Valley Accelerator program. Company leadership was motivated to spend Q1_2016 in Silicon Valley, networking and meeting with thought leaders in the Bay Area’s tech community.

While he was in California, I had a chance to speak by phone Silexica CEO Max Odendahl. As many know, the problem of parsing code to take advantage of multi-core systems is a massively tough one to solve, one of the Grand Challenges in computing. My conversation with Odendahl was compelling, because it would appear his company has the solution.

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Rutenbar’s Coursera: Grand & Crazy on a Planetary Scale

Thursday, April 21st, 2016

 


Just as Auguste Rodin revived the art of sculpture
at the end of the 19th century in Europe, and Wynton Marsalis rescued the art of jazz by the end of the 20th century in America, here in the 21st century University of Illinois CS professor Rob Rutenbar is resurrecting the art of teaching VLSI design around the world.

He’s doing that via his Coursera-based online class entitled VLSI CAD: Logic to Layout, a course with an enrollment that defies comprehension. Per Rutenbar’s own whimsy: “There are about 25,000 people working in the EDA industry today. About 55,000 of them have signed up for my class.”

I had a chance to speak by phone with Dr. Rutenbar earlier this week. He was sitting in his office in Urbana-Champaign, but looking out an academic landscape that encompasses the entire world.

[hint: a MOOC is a Massively Open Online Course.]

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Accellera’s PSWG: Realists and Optimists, the lot of them

Thursday, March 17th, 2016

 


Mentor Graphics’ Tom Fitzpatrick gave a lunchtime talk at DVCon
several weeks ago summarizing recent efforts to build a standard [set of standards?] around portable stimulus for verification. The room was packed with over 200 people and his talk was sufficiently complete, nobody asked any questions.

After his presentation, however, I did hear some comments. Namely that these types of standards are quite complex and difficult to develop. Hence, setting an actual delivery date of January 2017 for Portable Stimulus Standard Version 1 [PSS V1] is quite aggressive and optimistic.

I was not fully informed about Accellera’s Portable Stimulus Working Group [PSWG] prior to Fitzpatrick’s talk, so could not judge whether January 2017 is or is not overly optimistic as a delivery date for the standard. Since DVCon, I have studied the slides and attempted to better understand what this is all about: What is a Portable stimulus and what would a set of standards look like?

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Ajoy Bose: The Man Behind the Microchip

Thursday, March 10th, 2016

 


You would probably have learned more about Ajoy Bose
by reading his biography than by attending Jim Hogan’s gentle exercise in collegiality on Tuesday night, March 1st, in Silicon Valley. The conversation between these two giants of EDA, hosted by EDAC as part of DVCon week, was consistently unstructured, whimsical and seemingly without outline.

The next day, I sat in a coffee shop and struggled to find a handle with which to write a coherent summary of the previous night’s random access memory album. But that handle would not reveal itself.

Then I happened to glance over to a nearby table where another caffeine addict was buried in a book: The Man Behind the Microchip. I asked the addict who exactly was the subject of the book and the answer came back: Robert Noyce.

So Robert Noyce is the man behind the microchip, I pondered. The only man behind the microchip? Like Steve Jobs invented the iPod/iPad/iPhone? Or Thomas Edison invented the electric light?

No wonder, I realized, it was hard to get a handle on the previous night’s Hogan/Bose interview. They didn’t do anything. Robert Noyce did it all. And without help. Hogan and Bose did nothing, and ergo had nothing to offer their audience.

These two were not part of a vast conspiracy of contributors, all adding their particular drips and drops of innovation into the trickle of technology, that rolled into a small creek of creativity, that ran into a moderate-sized stream of science-turned-engineering, which poured into a roaring river of real change, which crashed into a seething sea of twenty-first century digital life.

Of course, that’s nonsense. Robert Noyce did not do everything, and Hogan and Bose did not do nothing.

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S2C: FPGA Base prototyping- Download white paper



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