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Posts Tagged ‘ACM Sigda’

Kaufman Award Dinner: Why you should Attend

Thursday, January 5th, 2017

 


IEEE’s CEDA and the ESD Alliance
– with help from their friends at PDF Solutions, Cadence, Mentor, Synopsys and ACM SIGDA – will host a dinner on Thursday, January 26th, in honor of the 2016 Phil Kaufman Award recipient: Dr. Andrzej Strojwas, Keithley Professor of ECE at Carnegie Mellon and long-time CTO at PDF Solutions.

Unfortunately, the last several Kaufman Award dinners were such over-the-top events – the 2014 event in honor of Dr. Lucio Lanza awash in glamour and luminaries, and the 2015 event in honor of Dr. Walden Rhines replete with zany zeitgeist and a roast from Intel-legend Craig Barrett unparalleled in the annals of EDA history.

The organizers of this year’s event may, therefore, find it impossible to craft something anywhere close to the previous two dinners, if the metrics of energy and frenetic glad-handing are the only ones of importance.

Of course, these are not the only two metrics of importance and nothing is ever impossible in EDA or IP, so do not despair.

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Tea Leaves at ICCAD: Struggling to see the cup half-full

Thursday, November 13th, 2014

 

Dreary sentiments notwithstanding from several panelists at an ICCAD evening session on November 2nd in San Jose, SRC’s Dr. Bill Joyner espoused optimism and energy for the future of EDA, even if said future doesn’t include the venerated Moore’s Law stretching off into infinity forever.

As moderator, Joyner convened the panel, “Moore’s Law is dying, EDA to the rescue!”, and turned over the podium straightaway to University of Pittsburgh’s Dr. Alex Jones for the first 20 minutes, which allowed the professor to report out on a 3-year Computing Community Consortium effort, just completed, to examine and exhume EDA from the doldrums.

The CCC’s group of 50+ academic and industry leaders have been meeting since 2012 at a series of SIGDA/CCC-funded workshops hoping to impact the future by nudging industry and academia into more productive avenues of research and development in design automation.

The report the committee published, “Workshops on Extreme Scale Design Automation (ESDA) Challenges and Opportunities for 2025 and Beyond”, was available in paper form at the back of the room during the ICCAD panel and has subsequently proved to be great reading, and fodder for a future blog. But this blog is a thumbnail sketch of the November 2nd discussion, so please read on.

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DAC 2012: Wicked Wednesday in San Francisco

Sunday, May 13th, 2012

 

DAC looms!

If you do nothing else on Wednesday, June 6th, at the Design Automation Conference be sure to attend the second of the two keynotes.

Intel’s Brad Heaney will be talking about “designing a 22nm Intel Architecture Multi-CPU and CPU.” It’s got well over a billion transistors and would have only been the stuff of Sci-Fi dreams a brief 15 or 20 years ago.

After that, just like on Terrible Tuesday, you’ve got a wicked wheelbarrow full of different ways you could go, starting with the User Track. The Wednesday line-up in this well-received recent addition to the DAC schedule includes:

* Packaging & Automatic P&R, with speakers from Mentor Graphics, Samsung, and Intel
* Keynoter Q&A, with the morning’s IBM & Intel speakers fielding questions from the crowd
* Practical Formal Methods, with speakers from IBM, Oski, and Intel

If your interests, however, reside with the young more than the mega-organizations in the EDA ecosystem, Wednesday is your day to visit the ACM Sigda University Booth in the Exhibition Hall, where the “new EDA tools, EDA tools applications, design projects, and instructional materials” will be your guide to the future minds of this industry.

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CST: Webinar series



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