What Would Joe Do?
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
September 13th, 2012 by Peggy Aycinena
Samsung Venture Investment Corp. has just put $4 million into Carbon Design Systems in conjunction with the debut of a new strategic partnership between the two companies.
Per the September 12th Press Release: “Funds from the strategic investment will be used as working capital and will support Carbon’s ongoing development of leading tools in the ESL design space, including its fast, accurate virtual prototypes. Initiatives will be undertaken to expand the reach of Carbon’s fast, accurate virtual prototypes.”
I spoke with Bill Neifert, Carbon’s founder, CTO and VP of Business Development on the day of the announcement. He was amazingly relaxed, a clear indication that the Samsung-Carbon partnership is a logical outcome of a long-term relationship between the organizations:
“Samsung been a heavy user of our tools for quite some time, and has been looking for ways to take even more advantage of that situation – to speed up product introductions, something that everyone’s trying to do in that marketplace.
“Today’s announcement is part of a Samsung initiative to advance their SoC design methodologies. They have both the resources and expertise today to innovate and are looking to us to help them with that. This is also a nice partnership for us, of course. It will help us share our methodology in a broader fashion.”
I asked if Samsung’s investment will jettison Carbon into an even better market position.
Bill said, “Yes, but this is a true partnership. It’s not just about money for Carbon, but about having additional access to Samsung’s time, expertise, and technology. Samsung wants to make better products, and enhancing our technology will also expand their customer base.”
September 12th, 2012 by Peggy Aycinena
This is a great story: Oski Technology decided to prove the validity and efficiency of Formal Verification, and proposed a public challenge for themselves at DAC – a 72-hour window of time in San Francisco whereby they would attack a design problem never before seen, analyze it, propose a verification plan, and execute on that plan between 5 pm on DAC Sunday and 5 pm on DAC Wednesday.
To get a design problem, Oski Technology put out a request for proposal to different companies. The design could be at any stage in development, but had to include the RTL and some level of specifications for what the architecture should do, as well as some simulations.
Among the 5 respondents, Nvidia’s suggested problem was the most appropriate: It was a design that was still not complete and needed verification. More importantly, Nvidia was not afraid to have possible bugs or flaws in the design made public, a sign of their own confidence. So at 5 pm on Sunday, June 3rd, the Oski Technology team opened the files provided by Nvidia.
I’ll let Vigyan Singhal, Oski Technology’s President and CEO, take the story from there in his own words. Vigyan and I spoke by phone on September 12th, the same day a 6-minute video of the whole process was made available by the company. [Here’s the link on YouTube.]
The challenge …
Per Vigyan Singhal: “We had gotten the design in advance from the verification manager at Nvidia, but couldn’t even look at the documentation until 5 pm on Sunday, let alone the RTL files. Then after we opened everything, we looked at the code and the design specifications and went from there.
“Initially during the first night and the next morning, we were mostly doing planning. As we learned more about the design, as is usual with this type of thing, we found some unexpected things. Some of the sub-modules were missing from the design. Nvidia had given us the simulation waves, however, so we could guess the functionality and from there wrote Verilog for those little modules.
September 5th, 2012 by Peggy Aycinena
There are thousands of companies based in Silicon Valley, but not all of them focus on the long-term play. Valin Corp. does have that focus, however, intentionally balancing their product portfolio across a range of industries, and investing in their employees with equal intensity.
Company President & CEO Joe Nettemeyer told me in a recent phone call that this strategy has allowed Valin to grow non-stop over the last half-decade: “We’ve achieved growth through a combination of internal development and acquisition, averaging 20-percent growth or more, per year, over the last 5 years, even in spite of a slight hiccup in 2009. We like to invest in industries that are counter-cyclical to each other. When there’s a slow-down in one area, we can cover the slack with revenue in another.
“We’re an infrastructure company working in the wafer-fab-equipment end of the semiconductor industry, designing and building system solutions for companies around the world that make semiconductor-based products. We just completed a project with AKT that makes equipment for large flat-screen panels to retrofit 30 systems for Samsung.
“We’ve also expanded our capabilities in other industries over the years, particularly as a strategic global distributor for Applied Materials. We’re recognized as one of the top 40 industrial distributors in the nation based on our sales revenue, and have just been recognized as one of INC Magazine’s 500/5000 fastest growing companies in America.
August 29th, 2012 by Peggy Aycinena
As Labor Day Weekend comes to a close, summer is officially over. Now it’s time to look out across the next 4 months and figure out how you’re going to spend your conference travel budget. Here’s just a small sampling of the many excellent options available to you.
* IMAPS: International Symposium on Microelectronics
* CICC: Custom Integrated Circuits Conference
* HPEC: High Performance Extreme Computing Conference
* IDC: Intel Developers Conference
* Design East: The Center of the Engineering Universe
August 23rd, 2012 by Peggy Aycinena
There are at least 4 ways to learn about Patent Law:
1) Go to law school.
2) Follow the ginormously expensive shoot-out between Samsung & Apple.
3) Read my articles on Patent Law.
4) Read recent Press Releases out of EDA.
* Mentor Graphics announces filing of suit against EVE for patent infringement
Clearly options 1 & 2 would take way too much time, so let’s go with a combo of options 3 and 4: First revisit several highlights of my articles on Patent Law, and then review the recent press releases regarding EDA-related litigations.
August 15th, 2012 by Peggy Aycinena
This week, Cadence announced availability of the 400-page Mixed-Signal Methodology Guide written by Jess Chen, Michael Henrie, Monte Mar, Mladen Nizic, et al, edited by EDA DesignLine’s Brian Baily.
Cadence says the book is targeted at both chip designers and CAD engineers, and “focuses on current and future advanced mixed-signal design challenges and solutions.” The company also says the book is “critically acclaimed and much anticipated,” which is a little confusing; if the book is much anticipated, how could it already be critically acclaimed?
Nonetheless, the availability of the book on Lulu.com – an on-demand self-publishing website – makes the text easy to purchase and reasonably priced: $69.00, marked down from $115 if you buy it by August 31st. The question is not one of price, however, but of usefulness: Where else are you going to get information on mixed-signal design if you want to get it out of a book?
If you go to Amazon, for instance, what can you find? Below is a small sampling of what’s currently available. Sorry for the tedious assignment, but if you scan through the contents of each book you’ll see there’s quite a bit of overlap, and there’s also quite a bit of differentiation. Looking at the first 4 selections on the list, and then comparing them to the 2012 Cadence publication, you may actually conclude that this new book by Chen et al is indeed bringing something very useful to the discussion of mixed-signal design, albeit with a focus on Cadence tools.
August 9th, 2012 by Peggy Aycinena
Ali Iranmanesh is a busy man. He continues to head up the Silicon Valley Institute of Technology, the school he founded in 1997, and continues to lead ISQED, the conference he founded in 1999. Now he is also leading ASQED, the Asia-based spin-off of ISQED Iranmanesh founded in Malaysia.
WWJD: What prompted you to start ASQED?
Ali Iranmanesh: It was a natural extension of ISQED, which I started 14 years ago. I decided to keep ISQED in Silicon Valley, and to create other conferences for different regions.
WWJD: Remind me how many ASQED’s have taken place.
Ali Iranmanesh: This is our fourth year, with the conference alternating between Kuala Lumpur and Penang in Malaysia. Our next event is scheduled for August 26th to 28th in Penang.
WWJD: Malaysia seems an unusual destination for a conference on design.
Ali Iranmanesh: Historically, there has been a lot of manufacturing in Malaysia, but not so much design. I’ve been working with the several government entities there, helping them to move up the value chain through training, and was able to implement the conference as part of that process. Now for the past few years, there has been design going on in Malaysia – the conference has done a great job helping with that.
August 8th, 2012 by Peggy Aycinena
Everybody loves to get medals because everybody loves to be best at something: Swimming, Diving, Rowing, Running, Jumping, Hurdling, Riding, Kicking, Dunking, Punching, Throwing, Serving, Digging, Batting, Vaulting, Balancing, Leaping, Cycling, Dancing, Singing, Strumming, Humming, or Whistling.
In the same way, everybody loves to get awards because it also means they’re be best at doing something: Starting, Founding, Investing, Inventing, Creating, Building, Programming, Designing, Testing, Manufacturing, Assembling, Integrating, Packaging, Selling, Leading, Teaching, or Winning.
Yes, it’s true: Everybody wants to be best at something, everybody wants to get a medal or an award, and yet it’s also true that not everybody can. Not everybody can be best, because the equation simply doesn’t allow for it.
And for those who cannot win awards or medals, they have two choices:
August 1st, 2012 by Peggy Aycinena
When Eric Filseth took over as CEO at Ciranova in September 2007, he was already a seasoned EDA veteran having clocked in an accumulated 17 years at Cadence at that point. Now here in 2012, Ciranova has just been acquired by Synopsys and it would seem Filseth’s organization has fulfilled the vision he articulated 5 long years ago.
Per Filseth in 2007: “The problems in analog are very hard. In the digital world, everything is very, very automated, but in the analog world it just isn’t that way. It’s still mostly done by hand and the concept of IP as you consider it in digital – take the RTL and port it to this design or that process – is not there. In analog, it’s still a manual thing for PLLs, and amplifiers, and so on.
“There’s been so much focus on digital SoCs, and things like place and route, there’s been a lot less time spent on analog. Now digital design works fantastically well. You can get a junior engineer with only a couple years’ experience designing thousands of gates a day.
“Just think about it. Over the last 20 years, we’ve had 4 or 5 generations of digital architectures developed but in analog, people are still doing things the way they did it 15 or 20 years ago. Clearly there‘s an opportunity here, and Ciranova is well positioned to take advantage of that opportunity.”