What Would Joe Do?
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
March 23rd, 2017 by Peggy Aycinena
The four panelists include Synopsys Chairman & CEO Aart de Geus, Cadence President & CEO Lip-Bu Tan, Mentor Graphics Chairman & CEO Wally Rhines, and ARM CEO Simon Segars.
The April 6th event will be historic because these Big Four unequivocally define EDA and IP – just as Stanford, Huntington, Hopkins, and Crocker defined Railroads in the West – and it’ll be poignant because you’ll never see them together again. Too many changes ahead.
Of course, the ESDA panel will also be whimsical: You’ll know no more about these CEOs and their companies at the end of the evening than you knew when you first arrived. That doesn’t mean the evening won’t be entertaining.
March 9th, 2017 by Peggy Aycinena
Of course, EDACafe’s own Mark Gilbert could have told you this. It wasn’t necessary to scour the websites of the Big Three in EDA to learn about the many jobs currently available in the industry, most for software developers, not surprisingly.
March 2nd, 2017 by Peggy Aycinena
In an industry like EDA that’s super dominated by just three players, there’s little if any room in the industry – or at a conference like DVCon – to showcase the ideas and innovations of the Small Guys. The Big Guys teach tutorials and present papers; the Small Guys get to hang posters in the hallways.
All of that was supposed to change tonight thanks to the sponsorship of the ESD Alliance and OneSpin Solutions, as well as Vista Ventures’ Jim Hogan.
Tonight, six of the Small Guys in verification appeared on a panel moderated by Hogan hoping to get their 60-minute shot at fame. A post-Happy-Hour hour in which to lay out their case for customers to come and sample the kind of innovation that everyone knows is the watchword of technology startups, particularly in EDA.
February 23rd, 2017 by Peggy Aycinena
Although Intel’s Shishpal Rawat, recently retired from Intel, is a hard act to follow as Accellera Chair given his long, productive years leading the organization, if anyone can do it Lu Dai can. He’s enthusiastic, energetic, optimistic, and an engineer – and not necessarily in that order.
Before talking about Accellera in our phone call this week, Dai spoke about DVCon, anchor tenant of Accellera’s outreach to design and verification engineers around the world. This next week, the Silicon Valley version will unfold in San Jose, with DVCon India happening in September, DVCon Europe in October, and the first-ever DVCon China in April.
February 16th, 2017 by Peggy Aycinena
I like spending time with executives from the EDA industry, in part because I used to be an executive in that industry. Last fall at the SmartFlow Anti-Piracy Summit, I had conversations with a dozen or so executives and heard a new urgency in their voices for help solving the challenge of unauthorized use of software and semiconductor IP.
February 9th, 2017 by Peggy Aycinena
Those interviewed include: TE Connectivity’s Nathan Tracy, Rambus’ Mohit Gupta, Anritsu’s Joe Mallon, CST’s Klaus Krohne, Keysight Technologies’ Stephen Slater, DVT Solutions’ Brian Shumaker and Signal Microwave’s Bill Rosas, Mentor’s Dave Kohlmeier, ESD Alliance’s Bob Smith, Cadence’s Sam Chitwood, and Asteelflash’s Matheiu Kury.
You can see all of the DesignCon 2017 videos here.
Also of interest this year at DesignCon in Santa Clara, Steve Yamaguma was the winner of the Amazon Echo offered in a raffle in the EDACafe booth at the show.
February 2nd, 2017 by Peggy Aycinena
Hence, per Brophy, this year’s DVCon is going to be great. He’s done nothing, the committees have done everything, and their work has been inspired.
You must bring something to the effort, I insisted.
Brophy chuckled and deflected my question: “I’ll defer to Wally Rhines’ thesis: The learning curve definitely doesn’t stop, even though Moore’s Law is slowing. And there will be a lot of opportunity to learn this year at DVCon.
January 26th, 2017 by Peggy Aycinena
Having interviewed Prof. Strojwas some months ago when he was first named the 2016 Kaufman Award winner, and knowing the event was in the capable hands of the ESD Alliance, this evening’s ambiance was not a complete surprise. But the display of emotion and palpable affection with which Dr. Strojwas is held by colleagues and family was almost mesmerizing.
In fact, as PDF CEO John Kibarian hit his stride at the podium, detailing the lifetime of achievements and leadership at the core of Dr. Strojwas’ award commendation, there could be no looking away.
January 26th, 2017 by Peggy Aycinena
DesignCon clearly continues to provide a learning venue for working engineers who deal with real-world problems, and again this year there will also be a lively exhibit hall.
Featured among the 185 exhibitors will be multiple companies offering tools for design – Cadence, Altium, Ansys, SiSoft, Mentor Graphics, Applied Simulation, EMA, DipTrace, Polar Instruments, SPISim, Valydate, XJTAG, and SpeedIC, among them.
Also exhibiting this year at DesignCon will be our own EDACafe.
Sanjay Gangal, President of IBSystems, and his team will be in Booth #1349 where they will be recording video interviews.
January 19th, 2017 by Peggy Aycinena
As compelling as that description may be, some observers are questioning whether the marked differences between maintaining expertise in chip design, verification, IP, and IP integration versus maintaining expertise in software integrity are too wide to make for easy co-habitation under one corporate roof.
Some would say putting EDA and chip design together with software security is not a good recipe for the long-term success of the company. But are these critics correct?