Archive for the ‘Uncategorized’ Category
Monday, March 24th, 2014
March 24th, 6:01 AM – Later this morning at Silicon Valley SNUG, the CEO of Synopsys will be presenting a keynote that will most likely dwell on the newest major tool release from his company: IC Compiler II.
Synopsys notified the press several weeks ago that the announcement would be made this morning, but we would only be blessed with a pre-briefing if we promised to honor the embargo. Undoubtedly most agreed to these most conventional of terms. However, either ESNUG was never asked, or simply learned details of the launch through more creative channels; a preliminary description and critique of ICC II were published there last Thursday for all to see.
When I asked Synopsys last Friday morning if the ESNUG post made their embargo invalid, it was clear I had touched a nerve in their organization. They were absolutely adamant that the embargo was still valid, and if I refused to promise to honor it, not only would I not receive my pre-briefing later that day, I would never receive another pre-briefing from Synopsys going forward. Ever.
Okay then, I’ve honored the embargo. I’ve also used the information published on ESNUG last Thursday afternoon to inform my interview with Synopsys last Friday afternoon. Speaking for Synopsys on my March 21st conference call with the company was Sanjay Bali, Director of Product Marketing. Numerous PR people were also on the call. Here’s an abbreviated report on how the interview went.
Friday, March 21st, 2014
It’s Friday afternoon and spring is busting out all over, so why would anyone want to sit on a conference call and talk about EDA? Well, if you were Ravi Subramanian, President and CEO of Berkeley Design Automation, you would. The company he leads has just been sold to Mentor Graphics and today’s his day to celebrate the feat with the press.
I spoke with Ravi for 20 minutes this afternoon and remembered straightaway why he is the real thing. Well spoken, fully informed, and completely disciplined in his presentation, still his extreme delight with the acquisition was in full view as he patiently fielded my questions.
Tuesday, March 18th, 2014
Agnisys exhibited at DVCon several weeks ago in Silicon Valley, but within the time constraints of the show I didn’t have a chance to talk with them. Fortunately, that was remedied at 9 am this morning – 9:30 pm in Noida – during a phone call with company CEO Anupam Bakshi, who was visiting his team in India at the time of our conversation.
Prior to his involvement with Agnisys, Bakshi served at Avid Technology, PictureTel, Blackstone Consulting Group, Cadence, and Gateway Design Automation.
WWJD – Let’s start with the elevator pitch. In 25 words or less, when did the company start and what do you do?
Bakshi – We started 6 or 7 years ago and are Massachusetts-based, although a lot of our development is done in Noida. Our products, called IDesignSpec, focus on the area that the big EDA companies don’t, providing an executable specification tool for chip design.
Thursday, March 13th, 2014
The following conversation with Joe Sawicki, VP/GM of Mentor Graphics’ Design-to-Silicon Division, looks at the complexities of deciding if and when a company should move down to the next process node. The interview was inspired by an upcoming panel at DAC, Designing on advanced process nodes: How many respins should you plan for?
Sawicki is an acknowledged expert in design and manufacturing, and “responsible for Mentor’s design-to-silicon products, including the Calibre physical verification and DFM platform, and the Tessent design-for-test product line.” I spoke to him by phone this week while he was traveling in Japan on business.
Wednesday, March 12th, 2014
In the spirit of full disclosure, Cadence paid for lunch yesterday for the Press Corps attending CDNLive 2014. We had a scrumptious gourmet meal at Tosca in the lobby of the Hyatt Regency before returning to the Santa Clara Convention Center next door to have an hour-long “one-on-one” with Cadence CEO Lip-Bu Tan. In truth, it was actually an hour-long “twenty-on-one” with CEO Tan, because all of the usual suspects EDA Press Corps was in the room throwing softball lobbing questions at Tan.
Over the course of the hour, we learned that CEO Tan has a host of different investment partners – sorry, didn’t write down the names – involved in his various VC-funded ventures that span everything from GoPro [the trendy wearable camera enterprise out of Half Moon Bay] to a fabless startup that he said can tape-out a design at 16 nanometers for a scant $15 million, rather than the usual $150 million being lamented today in the global press. [In fact, Tan mentioned so many ventures he’s involved with, it begs the question: How does he have time to run Cadence?]
We learned that CEO Tan is very excited about all of the technologies involved in the semiconductor design/supply chain, that he believes it’s a great time to be a player in the industry, and that Cadence is innovating rapidly on multiple fronts simultaneously. And if/whenever Tan senses that they’re slowing down in any particular area, he pushes Cadence Engineering to move forward even faster.
Thursday, March 6th, 2014
Oh my gosh: If you arrived at DVCon 2014 at 10:45 am on Tuesday this week, you’d have wondered if you’d wandered into the wrong conference. What happened to sedate, dignified DVCon? Standing at the registration desk on the first floor of the DoubleTree Hotel in San Jose, the volume of noise and conviviality sweeping down the staircase from the upstairs mezzanine was unprecedented. What was going on up there? The DVCon morning poster session, awash in company reps and their ideas, and engineers anxious to engage with both.
When I got to the top of the staircase, I took a moment before plunging into the crowd, amazed at the vitality and the numbers of people hobnobbing among the posters. It wasn’t surprising to learn later in the day from DVCon General Chair Stan Krolikoski that over a thousand people – attendees and exhibitors combined – were at this year’s conference. Clearly, DVCon is enjoying an extraordinary renaissance, so much so that DVCon Europe will be debuting this October in Munich, with DVCon India, DVCon China, and DVCon Japan now in the planning stages. Like I said, omg.
Wednesday, February 26th, 2014
How appropriate, the week prior to DVCon, for Cadence to announce a major new verification enhancement – Incisive vManager. Per a phone call last week with Cadence MDV [metric-driven verification] Product Management Director John Brennan, the company has spent the last 4 years working on this new “verification planning and management solution.”
Brennan said, “Incisive vManager has been in customer beta for the past 2 years, so this is actually our third release. Previously we’ve been quiet [about the product], but now we’re ready to say, ‘Come one, come all, and look at what we’ve done!’
“We’ve completely re-engineered and re-invented ourselves regarding verification planning and management – an important area I’ve been working on for over 10 years. What we’ve done with Incisive vManager is to redo our existing solution, both for reasons of scalability and for better addressing the needs of our customers, specifically the increased size and complexity of today’s verification [task] with a new client-based solution for multiple users.
Thursday, February 20th, 2014
These are good days for virtual prototyping vendor, UK-based Imperas. The company will be making appearances this coming week at Embedded World in Nuremberg, at DVCon in San Jose the following week, and at CDNLive in Santa Clara the week after that, as well as several events in the UK in this same time frame. Imperas has a lot to talk about, including an announcement involving MIPS, a division of Imagination Technologies.
Per CEO Simon Davidmann in a recent phone call: “We’re small, self-funded and growing, with revenues last year up 65 percent. [Even better], the type of customers we’re seeing are tier-one semiconductor and embedded systems companies. We want to help people build better software. No one builds a chip without simulation, and we believe software development should be done like that as well.”
I asked about the competition. Simon answered, “It’s true, other people have models in the same space as ours – companies like Synopsys, Cadence and ARM – but we tend to cooperate with them. Our real competition is legacy breadboards, and kick-it-and-see techniques, rather than proper methodologies.
“For most complex SoCs, many people try to develop software with simulation at the RTL level, or with a hardware-accelerator box, but those approaches don’t get the throughput of software and performance they need. And with a prototype, they don’t get the controllability and observability. That’s why most of our competition is the legacy mindset in the customers.”
Thursday, February 13th, 2014
If ever there was a year when you thought to attend DVCon, this should be it, according to a recent phone call with Cadence Fellow Stan Krolikoski, serving as General Chair for the second year in a row. That’s because DVCon 2014 will be serving up the D and the V in equal measure, and won’t be skewed towards the V in DVCon as it has been [perhaps] in the past.
Per Stan, “We’ve gotten feedback every year from attendees that they want more emphasis on design. They say they like verification, but they want more design, so last year I gave marching orders to the Technical Program Committee [headed by Paradigm Works’ Ambar Sarkar] that they should add more people on the review committee who represent design.
“It’s actually been a long time in coming. Although last year was the 25th anniversary of the conference, 10 years ago the name was changed to DVCon. Prior to that, it was HDLCon and the content reflected that name. When the name was changed to DVCon it was supposed to include both design and verification, but [functional verification emerged as the larger focus].”
That focus meant that those types of experts tended to dominate attendance, according to Stan, but that’s been fixed this year: “We will still have excellent functional verification sessions at DVCon – everything for the beginner through to the guru, it’s all there – but we will also have sessions on low-power design, on analog/mixed signal, and on system-level design, as well as IP integration. We’re clearly moving away from just verification in adding lots of design content to the program that’s of interest to our audience.”
Thursday, February 6th, 2014
When it comes to talking about Forte Design, only one word comes to mind: Classy. There’s always been a consistency of messaging, spirit and optimism comprising the public face of Forte, and no small part of that has been the spirit and personable styling of the VP of Marketing & Sales, that ultimate ESL Evangelist, Brett Cline.
Late yesterday afternoon, when I saw in an email blast from Semiconductor Engineering that Forte had been sold to Cadence, I was astonished [oh no, not another company sucked into the EDA Consolidation Vortex !?!], so I shot an email off to Brett and asked if he could make time for a phone call. True to form, he called me at 6 pm California time, which was 9 pm in snowy Massachusetts where Brett lives and works.
For the next 20 minutes, I listened to what has become the new normal in EDA: A great, albeit smallish company was made a “very fair offer” and although it may not have been the exit I myself would have predicted some years ago for Forte, Brett said that selling the company to a large EDA player is, today, the right and true decision for good leadership of good smallish companies in the industry.
All that being said, I noted an undercurrent of wistfulness in Brett’s voice. He wanted me to know how very much Forte Design has been run like a family company, that he felt about his co-workers at Forte as if they were family, and the fact that not all of them will be moving over to Cadence with the acquisition was making him profoundly sad last night. Profoundly sad.
Nonetheless, Brett and his co-execs at Forte will be moving to Cadence and the opportunities there, per Brett, are marvelous. He admires Cadence and is glad, given that Forte was going to be sold, that Cadence is where they’re landing. He admires the corporate culture at Cadence, thinks the management there respects the skills and technology being acquired with Forte, and thinks that not only is it a win for Cadence, but it’s a total win for Forte’s legions of loyal customers around the world.