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 What Would Joe Do?

Archive for March, 2016

ESD Alliance: If Edsel Ford had a twin sister

Thursday, March 31st, 2016


As much as the energetic re-branding of the EDA Consortium is to be admired
, the name of the new organization is causing distress: If you want to find out more about the newly launched ESD Alliance, your online search will be fraught with angst. Why?


Herb Reiter at EDPS: Multi-Die IC Design and Application

Thursday, March 24th, 2016


To speak with Herb Reiter about the rationale for multi-die packaging
is a chance to follow a logical and energetic continuum from first principles to a final conclusion. Namely, that as the era of the ASIC subsides, the era of the multi-die package will arrive full force.

Reiter, President of eda 2 asic, will be reiterating this line of thinking, in conjunction with a panel of like-minded experts, at the upcoming EDPS conference in Monterey on April 21st. In anticipation of that session – “Multi-Die IC Design and Application” – we spoke by phone this week. The conversation was compelling.


Accellera’s PSWG: Realists and Optimists, the lot of them

Thursday, March 17th, 2016


Mentor Graphics’ Tom Fitzpatrick gave a lunchtime talk at DVCon
several weeks ago summarizing recent efforts to build a standard [set of standards?] around portable stimulus for verification. The room was packed with over 200 people and his talk was sufficiently complete, nobody asked any questions.

After his presentation, however, I did hear some comments. Namely that these types of standards are quite complex and difficult to develop. Hence, setting an actual delivery date of January 2017 for Portable Stimulus Standard Version 1 [PSS V1] is quite aggressive and optimistic.

I was not fully informed about Accellera’s Portable Stimulus Working Group [PSWG] prior to Fitzpatrick’s talk, so could not judge whether January 2017 is or is not overly optimistic as a delivery date for the standard. Since DVCon, I have studied the slides and attempted to better understand what this is all about: What is a Portable stimulus and what would a set of standards look like?


Ajoy Bose: The Man Behind the Microchip

Thursday, March 10th, 2016


You would probably have learned more about Ajoy Bose
by reading his biography than by attending Jim Hogan’s gentle exercise in collegiality on Tuesday night, March 1st, in Silicon Valley. The conversation between these two giants of EDA, hosted by EDAC as part of DVCon week, was consistently unstructured, whimsical and seemingly without outline.

The next day, I sat in a coffee shop and struggled to find a handle with which to write a coherent summary of the previous night’s random access memory album. But that handle would not reveal itself.

Then I happened to glance over to a nearby table where another caffeine addict was buried in a book: The Man Behind the Microchip. I asked the addict who exactly was the subject of the book and the answer came back: Robert Noyce.

So Robert Noyce is the man behind the microchip, I pondered. The only man behind the microchip? Like Steve Jobs invented the iPod/iPad/iPhone? Or Thomas Edison invented the electric light?

No wonder, I realized, it was hard to get a handle on the previous night’s Hogan/Bose interview. They didn’t do anything. Robert Noyce did it all. And without help. Hogan and Bose did nothing, and ergo had nothing to offer their audience.

These two were not part of a vast conspiracy of contributors, all adding their particular drips and drops of innovation into the trickle of technology, that rolled into a small creek of creativity, that ran into a moderate-sized stream of science-turned-engineering, which poured into a roaring river of real change, which crashed into a seething sea of twenty-first century digital life.

Of course, that’s nonsense. Robert Noyce did not do everything, and Hogan and Bose did not do nothing.


S2C: FPGA Base prototyping- Download white paper

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