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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

Andrew Kahng: Modeling the Future of Semiconductors (and Test)

September 30th, 2015 by Peggy Aycinena

Andrew Kahng is Professor of CSE and ECE at UC San Diego, and former General Chair at DAC, ISQED, and ISPD. As such, he knows what people who attend conferences need to hear. Next week he’s taking that knowledge to IEEE’s International Test Conference in Anaheim, delivering a keynote entitled: Modeling the Future of Semiconductors (and Test).

The question is, why is test an afterthought in the keynote title when test is never an afterthought in the flow required to get from design to volume manufacturing? One good guess would be because the world still thinks test is an afterthought, evidenced loud and clear by the fact that a conference on test lives as a separate entity from DAC, ISQED, or ISPD.

But again, how can test represent a set of ideas and disciplines sufficiently disconnected from design to live in its own silo? The answer is, test is not disconnected from design, but it does rely on a completely separate set of skills than design.

While design moves forward motivated by a hypothetical set of goals, focusing on a model of perfection that reflects a desired outcome, test moves forward motivated by a realistic set of features; it’s not about the model of the DUT, but about the reality of the DUT. Design deals with what could be, but test deals with what actually is. Important distinctions, which rightly cause test to live in a different conference space than DAC, ISQED, or ISPD.

Which brings us back to ITC and Dr. Kahng’s talk. Hopefully, you’ll be in Anaheim on October 7th to hear him speak. He is one of the leading experts in the field.


Modeling the Future of Semiconductors (And Test) …

Which semiconductor products will drive manufacturing and test technology over the next 10 to 15 years? In the past, Moore’s Law has been used to predict the continuing evolution of semiconductors. Now, however, we are seeing an explosion of new device, memory and heterogeneous integration technologies aimed at achieving “More than Moore” scaling of product value. By looking at the applications that drive this explosion of new technologies, we can begin to model what the future might look like, and how the industry can deploy cost-effective manufacture and test strategies in the coming years. Three applications in particular-Smart Phone, Datacenter and IoT-will continue to have great influence on both semiconductors and systems. The ITRS “2.0” semiconductor roadmap projects these applications into the future to model potential benefits of future technologies. What will semiconductors look like in the next 10 to 15 years? Let’s find out!

About Andrew Kahng:

Andrew Kahng is Professor of CSE and ECE at UC San Diego, where he holds the endowed chair in High-Performance Computing. He has served as visiting scientist at Cadence (1995-1997) and as founder, chairman and CTO at Blaze DFM (2004-2006). He is the coauthor of three books and over 400 journal and conference papers, holds 30 issued U.S. patents, and is a fellow of ACM and IEEE. He has served as general chair of DAC, ISQED, ISPD and other conferences. He is also international chair and co-chair of the Design Technology working group, and recently of the System Integration focus team, in the ITRS since 2000. His research interests include IC physical design and performance analysis, the IC design-manufacturing interface, combinatorial algorithms and optimization, and the road-mapping of systems and technology.


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