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 What Would Joe Do?
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

Wild West: OneSpin’s Dave Kelf rides shotgun on SystemC

 
March 23rd, 2015 by Peggy Aycinena

The last time I spoke at length with OneSpin’s Dave Kelf, the conversation was all about the Cloud. This week we picked up where we left off, talking about the Cloud, but then moved on to the Wild West. Dave is quite taken with the idea that the current situation in EDA is on par with the Wild West, that mythical place where a lack of structure and entrenched establishment allows true innovators to run wild free. First however, we caught up with OneSpin and the Cloud.

Dave said, “These days, engineers cannot afford to stick their necks out. Neither their managers nor their corporate leadership want to take risks, and the engineers know it. Although engineers realize moving design to the Cloud makes sense, when they try to explain that to their bosses or corporate lawyers it often leads to legal discussions around the problems of having [propriety] IP leave the company’s server.

“At OneSpin, however, we are able to eliminate these issues by generating abstract verification proof problems that go to the Cloud for computation without the transfer of IP or even [identifiable markers], assuring our customers that the process is very secure. Moving to the Cloud means design teams will have access to infinite computing, with huge verification jobs running simultaneously.”

“Nonetheless,” he added, “the hesitancy continues.”

“Will that change?” I asked, and referenced my recent conversation with Silicon Cloud where confidence in Cloud-based design runs high.

Dave said, “Interestingly, Amazon, Microsoft and Google have excellent Cloud solutions in a range of industries. When these companies, known to be extremely secretive, start designing hardware using Cloud-based solutions, and let the rest of the industry know about it, the rest will follow. The advantages of Cloud-based design are clearly huge. Soon we’ll be seeing a big snowball effect.

“Then, even though company lawyers tell their engineering teams they can’t move design to the Cloud, there will be a change in attitude when the company’s competitors begin to demonstrate increasingly significant advantages of using Cloud-based solutions. The kind of advantages that shorten the verification cycle from 9 months down to 3.

“These advantages are particularly obvious in formal verification. Big formal jobs can take lots of hours to run. But running a job on the Cloud, with access to hundreds of machines and licenses, means you can run lots of assertions in parallel, which can effectively reduce an 8-hour job to 15 minutes, depending on the assertions used. With these levels of benefits, we’re going to see the move to the Cloud pick up a great deal of momentum.”

“Sounds great,” I said. “Any of your customers willing to go on record about their Cloud-based design and verification successes?”

Dave chuckled: “It’s really annoying. We do have customers enjoying those kinds of successes, but they won’t tell anyone because they see it as part of their secret sauce. Of course, for customers who are still leery of working in the Cloud, we are happy to provide our verification solutions in the traditional way, on their local machines.”

Speaking of tradition, I asked Dave to expound on his Wild West thesis.

He was enthusiastic: “There’s a huge trend in the market today. If you look at the RTL level, Cadence and Synopsys have that flow wrapped up. Yes, companies like OneSpin are improving the verification part of the thing, but Cadence and Synopsys really own the core design flow. They’ve driven their solutions all the way out to manufacturing, to places like TSMC and GlobalFoundries, and it’s working well.

“Above RTL, however, things are evolving. There, the central design space is like the Wild West. People are doing SystemC design using different kinds of tools and techniques, although there’s no real standardization in terms of how SystemC is being used. Even SystemC itself is only loosely standardized. It’s all over the map.”

Kelf took a breath, and zeroed in: “And so, the analogy is right there.

“As the United States evolved, 150 to 200 years ago, the East Coast was building big cities and the associated governmental structures. Things were consolidating into an established order. Out in the West on the frontier, however, things were different. There was not a lot of structure. If you look at EDA today, the analogy is definitely there. It’s an ‘East Coast’ dominated by Synopsys and Cadence with the ‘left’ of the map being the frontier, everything above the RTL level. And that includes SystemC.”

“Are we talking ESL here?” I asked.

Dave addressed my non sequitur firmly: “I’ve never liked that term, ESL. What is that anyway? Is it transaction-level modeling at the SystemC level? No. Is it everything at the hardware-focused level? No. Matlab algorithm design? Is it moving pieces of IP around? ESL suggests RTL-Plus, but it’s not really that either.”

Boom, done. We returned to the Wild West.

“One thing that happened in North America,” the Brit continued, “was the postal service and the railroads. Those kinds of things were efforts to stabilize the Wild West.

“Similarly, that kind of effort is going on today in EDA. High-level synthesis is a great example. Cadence has made a huge effort in that area. A SystemC defacto synthesis subset is emerging, with companies trying to create tools around that. That work is comparable to Synopsys working at the RTL level many years ago.

“Of course, one of the reasons to move out West was, literally, the pot of gold that might potentially be waiting in Northern California. That’s true today as well, although maybe not so literally. But getting this flow right could lead to significant value for those brave enough to take it on.

“In the verification space, OneSpin is also making a great effort around SystemC. At DVCon, we announced that our DV tools now support SystemC and that will help create structure in the SystemC space, offering a small step towards creating order in the Wild West.

“Accellera is helping with all of this as well. They’ve got a committee looking at a synthesizable subset of SystemC. That’s important because there are an awful lot of big companies these days using SystemC, possibly more than either Cadence or Synopsys realize. Not surprisingly, the EDA companies are not anxious to support Open Source tool flows, but it’s happening nonetheless.”

“Is it time to celebrate,” I asked, “with all of these opportunities presenting themselves?”

Dave said, “Yes, absolutely it’s time to celebrate. And what’s so exciting about SystemC is how it’s affecting how people feel about EDA these days. In general up until recently, when you talked to people there was a distinctly negative sense around EDA.

“But now that things are breaking open at this whole level above RTL, it’s just exciting. There’s a lot going on, and we’re seeing all of the big customers working in this space: Qualcomm, Sony, Intel, Broadcom, Fujitsu, Samsung, NXP, etc, etc. All of these big accounts have a lot going on in connection to the hardware/software space.

“It’s just very exciting! There are huge opportunities for companies like us, building on this ground swell in the industry. We’re putting all our focus on the apps running on our strong core engine to provide these new flows.”

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SAN JOSE, CALIF. –– February 24, 2015 –– OneSpin Solutions, provider of innovative formal verification and formal equivalence checking solutions, today announced that OneSpin 360 DV now supports the SystemC language, delivering the first SystemC Assertion-Based Formal Verification Solution.

The addition of SystemC is a natural extension of the OneSpin 360 DV tool suite, allowing engineers to receive the full benefits of formal Assertion-Based Verification (ABV) and automated design inspection solutions for their SystemC design code. Both C language assertions as well as the SystemVerilog Assertion (SVA) standard are supported to allow established definitions for assertion specification. The OneSpin formal debug environment and full complement of advanced formal proof engines operate seamlessly on the SystemC code.

The product line allows for both the automated design analysis capability of OneSpin 360-DV Inspect and the full assertion-based flow of OneSpin 360-DV Verify to be applied to SystemC code. The SystemC style often leveraged as an input to High-Level Synthesis (HLS) tools is specifically targeted. This allows for effective functional verification to be applied directly to this design representation, rather than indirectly to the synthesis output as with previous methodologies.

Dr. Raik Brinkmann, OneSpin Solutions’ President & CEO, is quoted: “Design and verification teams are looking more closely at SystemC to meet a variety of complex electronic design requirements and need reliable assertion-based checking for rigorous verification.

“Until now, there was no clear solution for the comprehensive formal verification of SystemC coded functionality. We’re delighted to fill this need with OneSpin 360 DV-Verify and 360 DV-Inspect, which solves a number of challenges for SystemC language users.”

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