Synopsys’ Newton Project: Isaac, Richard, and the Power of 10x
March 24th, 2014 by Peggy Aycinena
March 24th, 6:01 AM – Later this morning at Silicon Valley SNUG, the CEO of Synopsys will be presenting a keynote that will most likely dwell on the newest major tool release from his company: IC Compiler II.
Synopsys notified the press several weeks ago that the announcement would be made this morning, but we would only be blessed with a pre-briefing if we promised to honor the embargo. Undoubtedly most agreed to these most conventional of terms. However, either ESNUG was never asked, or simply learned details of the launch through more creative channels; a preliminary description and critique of ICC II were published there last Thursday for all to see.
When I asked Synopsys last Friday morning if the ESNUG post made their embargo invalid, it was clear I had touched a nerve in their organization. They were absolutely adamant that the embargo was still valid, and if I refused to promise to honor it, not only would I not receive my pre-briefing later that day, I would never receive another pre-briefing from Synopsys going forward. Ever.
Okay then, I’ve honored the embargo. I’ve also used the information published on ESNUG last Thursday afternoon to inform my interview with Synopsys last Friday afternoon. Speaking for Synopsys on my March 21st conference call with the company was Sanjay Bali, Director of Product Marketing. Numerous PR people were also on the call. Here’s an abbreviated report on how the interview went.
The Newton Project …
Sanjay: These are very exciting times. This is a brand new place-and-route tool, built from the ground up. The biggest product at Synopsys is place-and-rout, so this new product is very exciting. It’s currently available for handpicked customers, and the feedback has been nothing short of phenomenal.
IC Compiler has been the market leader for many years – two/thirds of designers world-wide use IC Compiler across all process nodes. Then a few years ago, we asked ourselves: What can we do to continue to offer order-of-magnitude benefits [in this area]?
We wanted to make the changes evolutionary, to re-incorporate stuff and re-engineer. We are now at the point where we are introducing IC Compiler II, a full-featured place-and-route that offers a world of opportunity that’s [previously] eluded the physical designer community.
A customer you’ll see on Slide 6 is Imagination Technologies. They’re announcing a new product that used IC Compiler II, a gigantic 20-million chip. Also, other customers in the traditional design community [are seeing] benefits. Using stable tools is important, but customers are now so glad to be using this technology, they’re deploying it in real production designs. And last week we observed that IC Compiler II is 10x faster than IC Compiler.
If you look at slide 8, it’s a representation from the viewpoint of place-and-route from 10-to-15 years ago. But IC Compiler II is not just place-and-route; this is now much more for complex designs.
WWJD: You mention the tool will handle 20 million instances. Is there an upper limit to how much design ICC II can process at once?
Sanjay: We are not aware of any limitations, 20, 30, even 40 million instances [and up]. As you are aware, we get used by the most complex processor companies. We have not heard of any limitations.
WWJD: Published industry reports say that ICC II is multi-CPU, and possibly offer multi-threading and distributed processing. Is that accurate?
Sanjay: It has both distributed processing, as well as multi-threading, and can break into multiple parts and run on multiple machines.
WWJD: Published industry reports say that ICC II took 5 years to develop. Is that accurate?
Sanjay: To put this together has been a multi-year effort, using a unique mix of assets at Synopsys. We’re lucky to have a deep resource pool and collaborations with customers.
How did we get here? We started from the ground up, and the new infrastructure was key. Taking that into account has given us the opportunity to rethink some of the critical engineering that enables faster time to tapeout. But there is also some pretty battle-hardened technology that has been brought to bear here. When the project started, the war cry was for 10x improvement.
WWJD: Published industry reports say ICC II has a single data model, versus two data models in ICC. Is that accurate?
Sanjay: Yes, and through the Magma acquisition the Magma style now [helps with that]. The advantage over the previous two data models in the original [provides] a 10x [improvement] in throughput.
WWJD: I am working on a series of blogs about the difficulties of marching down node to node, starting last week with a conversation with Mentor’s Joe Sawicki. Is ICC II going to help with that process?
Sanjay: IC Compiler supports 20, and even 14 nanometers, so I don’t see [the move to] a new node would be driven by [IC Compiler II], but I do see people wanting to get to market faster. [People working on] an increased size of design, those are the guys who will jump on [IC Compiler II], but the adoption won’t be node driven. The folks who will come to SNUG next week will be designing at 40 nanometers.
The tool is node agnostic and planned to provide support to all customers. [People working] at emerging nodes can use the benefits of IC Compiler II, but everyone can get a comparative advantage [from using it].
WWJD: Published industry reports say ICC II was supposed to be released at DAC last year in Austin, but wasn’t ready. Is that accurate?
Sanjay: We inform customers who work with us [when a new tool is ready], and there are never definite milestones, not DAC or SNUG, or any conference. It’s only when we think we’ll be ready [that we release a product].
WWJD: Published industry reports say that ICC II reuses some existing technology. Is that accurate?
Sanjay: It is built on an absolutely brand new infrastructure, including a new infrastructure data model. [New technologies] include a combination of things – optimization, data model, a different way of doing implementation, a new engine, less memory – all coming together, which will significantly reduce runtime.
WWJD: Published industry reports suggest customers will want to benchmark ICC II against other products. Which products from which companies do you think should be bench-marked against your new release?
Sanjay: The customers would have to make that choice. I’m only here to talk about the value of the product.
WWJD: Let me put it a different way: Who is your competition?
Sanjay: There are other EDA companies, but the way I look at it, I’m only competing with myself. We have a leading tool of choice. If I keep extending that, [I am successfully competing].
WWJD: Published industry reports say this new product is called “The Newton Project”. Is that Isaac or Richard?
Sanjay: I would guess the physicist. Sorry, but I’ve never heard of Richard Newton.
One could legitimately argue either way as to the correct answer to the question of which Newton, Isaac or Richard?
Clearly, it could be Richard, on account of his significant presence in the EDA industry stretching way back into the misty past of the last millennium. The late Dr. Richard Newton was Dean of Engineering at U.C. Berkeley and the 2003 Kaufman Award Winner.
Or it could be Isaac. Who better to honor in creating yet another tool that allows the march of technology to keep on marching, than someone who established the fundamental laws of physics, which in turn precipitated centuries of additional work that eventually lead to even more advanced physics, material science, engineering, and little teeny tiny features etched onto sheets of sand that make everything that you and I use go hum, buzz, beep, ping, patter, record, spy, remember, sense, change, dither, jitter and jump?
Tags: IC Compiler II, Isaac Newton, Place-and-Route, Richard Newton, Synopsys