Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
3D technologies: Help for ‘The Lost Generation’
October 10th, 2013 by Peggy Aycinena
Bill Martin, E-System Design President & VP of Engineering, sent the following essay detailing 4 Generations in the History of Electronics, including the Last/Lost Generation …
“If I have seen further, it is by standing on the shoulders of Giants.”
1st Generation (1940-1960s): Vacuum tubes and possibilities
The start of the electrical computer age produced first generation electrical computers that required large rooms to contain them. These computers were large, heavy, power-consuming devices that had poor reliability (mean time between failures, MTBF): nothing like today’s handheld consumer devices that are more powerful, fit in your pocket, easily connect wirelessly to networks and can last 4+ hours on a single charge.
A few smart engineers realized that larger systems could not be built unless higher levels of integration were possible, helping to improve MTBF, size, weight, power and cost: a recurring theme for each generation that followed.
2nd Generation (1960-1980s): Introducing Transistors and the silicon revolution
Jack Kilby (Texas Instruments) and Robert Noyce (Fairchild Semiconductor) both created key concepts to enable a world based on transistors. This era helped refine how to design and manufacture custom designed integrated circuits (ICs). All IC products were custom developed using Spice simulators.
Towards the end of this era, a new industry, Electronic Design Automation (EDA), was created. EDA’s contribution: reduce the resources and time required to develop while minimizing errors. New EDA software applications were created to aid engineers in their design and validation tasks.
These technologies allowed older vacuum tube based products to be replaced with transistorized products (i.e. radios), while new consumer products were introduced such as calculators, digital watches, etc. The consumer market purchased new transistorized products, allowing for a robust and healthy high-tech ecosystem.
3rd Generation (1980-2000s): ASICs for all
The key founders of VLSI Technology and LSI Logic both realized that the world’s appetite for silicon required an easier method to design ICs.
Each company was vertically integrated, offering tools, silicon, libraries and services. Rather than work with Spice and customize each transistor, characterized libraries of basic functions were offered. Alone, this would not have sparked the ASIC craze. A more efficient entry, simulation and layout method was required.
The companies created multiple views of each library component: schematic, simulation and physical. These views allowed schematic capture, simulation and layout tools, respectively, to insert a level of abstraction. This was an important step in enabling more engineers to design ICs rather than a small select group.
About midway through this generation, an accelerant was added to the EDA tool kit from Synopsys called logic synthesis. Rather than creating designs using schematic symbols, engineers now produced RTL code that could be compiled into gates. Rather than designing the logic, an engineer could describe the function and have software determine the best gate implementation.
As with the 2nd Generation, cost savings drove many designs where multiple PCBs and most of the bill of materials (BOM) could be integrated into a single ASIC. Consumers benefited from cheaper, more reliable, less power consuming, and higher functionality products than previously available. Many of these older designs were converted using the schematic entry approach since their documentation was schematics.
The talent for RTL programming was growing and brand new concepts would explore RTL programming for documentation. The restrictions based on available talent, cost or security was quickly removed. To see how far the 3rd Generation had propelled silicon technology, consider that greeting cards started to play music.2
4th Generation (2000-2020s): The Lost Generation?
Our 4th generation started with the DotCom bubble bursting. Many high technology companies had financial issues caused by large inventories and aggressive business models, such as selling their products on extended credit. Stock prices plummeted, and raising money or selling products was difficult for startups and large companies alike.
A few years later, the second wave of financial crisis rocked the entire world when the housing bubble exploded. Coupled with the financial aspects, this crisis also featured a disaggregated technology market.
Is it any wonder this generation might be considered The Lost Generation? The first half was consumed by a level of financial distress that the overall industry had not faced in the previous 3 generations.
Remember, in the 2nd Generation Robert Noyce demonstrated that improving manufacturing yields required many learning cycles? Along those lines, previous generations had one, or several, companies that could drive a new solution from concept through proof of concept to mass production.
Today, collaboration between many players must be agreed upon to create solutions. These agreements encompass technical issues, business models, and how to protect each other’s intellectual property. All of this increases the time required before solutions are available.
But now in the 4th Generation, there is a glimmer of hope: 3D silicon and 3D packaging. We have seen each technology generation emerge as more complex than the previous, requiring new products to help design and validate the next generation of products.
3D silicon processing has already been seen in specific memory products from Samsung and others. This is just the start as the industry learns how to manufacture these devices.
Meanwhile, 3D packaging is another technology that can accelerate integration, performance improvements, power and cost reductions, and open up new product areas. Some commercial products have been using this for years, but it is not used by all products, yet.
Dr. Swaminathan, in an upcoming book3, has documented the integration trends between silicon and packaging as shown in Figure 1 below. Mass-produced silicon has continued to march along with linear growth, while PCB and packaging solutions have significantly lagged until recent years.
SIP/POP using silicon, glass or other substrates has given new life to packaging. Today’s packaging requirements are much more complex than a generation ago. Today, many silicon designs have package solutions custom designed to support their electrical and power requirements.
Figure 1: Integration trend (Source: Interconnect and Packaging Center, Georgia Tech. Packaging Research Center, Georgia Tech and IEEE Spectrum)
Some may state that one 3D technology will win out over the other. I do not believe this. Both technologies have so much to offer in different areas: one in silicon processes, while the other focuses on packaging. Using only one of these restricts the gains if solely based on the chosen technology: the yield is a linear progression. If both technologies are used, however, gains can have multiplying effect.
Big Hairy Audacious Goal?
Given our latest products’ complexities, verification is a huge issue consuming a significant portion of the resources and schedule to complete. Mentor’s recent Veloce2 emulator has shown significant improvements in physical size (4x) and power/AC (3x) required from their first generation.4
Now consider: What if the 3rd or 4th generation emulators were designed using several 3D technologies? Could we ever have an emulator with 8-16 billion gate capacity, 100MHz clocking that fits in a shoebox and runs of standard 120AC, requiring no cooling?
It may be a dream today, but the reality might be closer than you think.
1 Wikipedia shows various variations of this expression dating back to 1159 and Bernard of Chartres.
2 “Computer chip strikes again: greeting cards that sing”, David T. Cook, The Christian Science Monitor August 30, 1982. http://www.csmonitor.com/1982/0830/083043.html
3 Madhavan Swaminathan and Ki Jin Han, “Design and Modeling for 3D ICs and Interposers”, World Scientific, September 2013.
4 Veloce2 Product Brochure, Mentor Graphics 2013.
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