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 What Would Joe Do?
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

DAC 2013: carpe diem with Ten in Texas

 
May 16th, 2013 by Peggy Aycinena

Let’s be honest. If you haven’t booked your flight and hotel yet for the Design Automation Conference in Austin in the first week of June, you’ve probably decided you’re not going. If that’s the case, more’s the pity because the sessions alone are going to be great, above and beyond the parties and networking, and will make the trip totally worthwhile. Here’s a sampling of the some of the topics that will be among the most compelling, with an acknowledgment that not everybody’s interests are the same.

OneDesigned in Texas. What better place to showcase the past, present, and future of regional contributions to the design industry than by featuring 6 different sessions on Monday, Tuesday, and Wednesday discussing Texas-centric things like Physical Design, FPGAs, Automotive Microcontrollers, and DSPs?

TwoDesigning & Modeling Biology. This stuff may not be at the center of your particular technology world, but it’s just so very interesting. Carve some time out of your more mainline topic material and attend this session on Tuesday from 10:30 to 12 noon. People from Stanford, Rice, UT Austin, CMU, and Pittsburgh will be speaking.

ThreeThe Silicon Flashlight. No, this isn’t about a device to keep on hand in case of natural disaster; it’s a session about peering in to the future of Moore’s Law. How and when do we get to 6 nanometers is the intended focus of the discussion. Mystery may turn out to be the tangential topic. The speakers on Tuesday from 4:00 pm to 6:00 pm will be coming in from IBM, GSS in Glasgow, Arizona State University, UC San Diego, and the Technical University of Munich.

FourElectronics & Software on Wheels. Which is just a different way of saying, Electronics and Software on steroids. When was the last time you really knew how many chips and how many lines of codes reside on your late-model automobile? Well then, you should be attending this session on Wednesday from 4:00 pm to 6:00 pm to be finding out. Speakers will also be from Munich, as well as TUM Create of Singapore, GM, Seoul National University, Escrypt from Michigan, and Infineon.

FiveCoping with Imperfect Design & Silicon Defects. What better place than the home of Office Space to “expose the realities” of an imperfect world? Speakers from Freescale, National Taiwan University, Portland State, the Chinese University of Hong Kong, the University of Cincinnati, the Indian Institute of Technology, and Synopsys will bring a vast international viewpoint to why bad things sometimes happen to good chips. Tuesday from 1:30 pm to 3:00 pm.

SixWhen Applications & Architectures Collide. Which is another way of saying, Why can’t we all get along, even if you’re Hardware and that other guy over there is Software? Folks from RWTH Aachen University, Jadavpur University in Kolkata, the University of South Wales, Penn State, IBM, and the University of Michigan are going to present some highly technical material on topics as diverse as stochastic circuits for real-time image processing and re-configurable pipelined co-processors for multi-mode communication transmission. It’s all about technical as it can get at DAC. Take a deep breath, a tall cup of coffee, and a sharp pencil to Thursday’s session from 9:30 am to 10:30 am to test your comprehension.

SevenLet the 3D-IC Chaos Begin. Round out your dance card with a technical panel, even if you say such sessions are a bit content-lite. On Wednesday from 1:30 to 2:30, experts from Cisco, Duke, ASSET InterTech, IBM, and Xilinx are going to talk about what’s leading up to, and inhibiting, the economic viability of the 3D-IC. This stuff’s probably in your future, so show up and listen to people who know why it’s going to get harder before it gets easier in the trendy world of All Things 3D.

EightDon’t Fret about your FinFET. Which is basically code for “DO Fret about your FinFET”, because not only are they arriving, whether you like it or not, but so are all their associated problems: e-Beam lithography, design rule corrections, 3D design planning, and new physical design algorithms. Folks from IMEC, Synopsys, and the National Taiwan University want to ease your pain by filling your brain with some of what they know about all of this. It’s true this session conflicts with No. 5 highlighted above, but oh well. Sometimes life isn’t fair. Especially at DAC, when there really are times when you wish you could be in more than one place at the same time.

NineSystem Design with Power & Thermal Constraints. Which basically summarizes all things EDA: system design, power problems, heat problems. What else is there, really? Round out your week in Austin by attending the last session of the conference, Thursday from 3:30 pm to 5:30 pm, when people from the University of Minnesota, University of Waterloo, IIT Mumbai, CMU, National University of Singapore, CSR, Nanyang Technological University of Singapore, Brown, UC San Diego, Intel, UC Irvine, and George Mason University will set the tone for the next few years in EDA and design. Solve the conundrums of system design, power and heat and the world will beat a path to your door. Or to Austin.

Ten – Last call. Let’s be honest. If you’re not coming to Austin, you’re missing a chance to expand your horizons. Clearly not everybody’s got the budget, or the time, to get to DAC these days, but if you are lucky enough to be traveling to Austin next month, there will clearly be enough diversity of subject material and speakers to fill a month of Sundays. I hope you’ll be there to enjoy it all.

As well as the parties and the networking …

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