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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

DAC 2013: co-locating ESLsyn in Austin

January 23rd, 2013 by Peggy Aycinena

Each time around, it’s an interesting exercise to see what conferences are being co-located with DAC, and this year is no different. From May 31st to June 2nd in Austin, the 2013 Electronic System Level Synthesis Conference [ESLsyn] will be co-located with the 50th Design Automation Conference. That’s a particularly interesting choice, because after so many years of ESL enthusiasts positioning system-level design at the center of all things EDA, why does it still need its own conference?

Well, let’s look at the organizers’ description of the meeting: “ESLsyn focuses on automated system design methods that enable efficient modeling, synthesis, exploration and verification of systems from high-level specifications down to lower level implementations.”

Okay. That’s sounds good. But, again, isn’t that stuff covered in a host of different sessions at DAC itself, in particular in Tracks EDA1 and EDA2?

EDA1. System-Level Design & Codesign
* System specification, modeling, analysis, simulation, verification, and performance analysis
* Scheduling, HW/SW partitioning, HW/SW interface synthesis
* IP and platform-based design
* Security and IP protection
* Design of Multiprocessor System-On-Chip (MPSOC) and case studies
* Application-specific processor design tools

EDA2. System-Level Communication and Networks-on-Chip
* Modeling and performance analysis
* Communications-based design, communication and network synthesis
* Optimization for energy, fault tolerance, reliability
* Interfacing and software issues, beyond-the-die communication
* NoC design methodologies, case studies and prototyping

That’s the ESL stuff at DAC, so what’s going on at ESLsyn? Per the website, topics include …

* Virtual prototyping
* Design space exploration
* System synthesis
* System architecture at early stages of the design process
* ESL models
* ESL-to-implementation design flow
* Code reuse
* Verification earlier in the design process

Again, okay. It’s looks like the topic material at ESLsyn is indeed different enough from the ESL material at DAC to warrant a separate conference. Hope you have time to attend both.

Meanwhile, for the folks who maintain that ESL is at the heart of the future of EDA, they’re going to have to work harder to get the material currently included in ESLsyn to be more thoroughly covered at DAC. Only then will they prove that their version of the evolution of the technology is more than just a vision; it’s actually a reality.


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