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 What Would Joe Do?

Archive for 2012

Word Cloud: EDAC 2012 CEO Forecast Panel

Saturday, March 17th, 2012

 

A lot of ink is always spilled over the EDAC CEO Forecast Panel, and this year was no different.

Ed Sperling moderated the panel and had slides to facilitate. They’re available here on the EDAC website. The full video version of the event is now available, as well.

If you would rather read about it, Mike Demler transcribed the event, Paul McClellan encapsulated the event, Richard Goering observed the event, and Steve Leibson abstracted the event.

I was also there on February 29th in Santa Clara, but rather than re-invent the wheel and provide redundant commentary, I’ve taken my notes from the evening and used them to create a Word Cloud. [see below]

If you study it carefully, you’ll see it pretty much sums up the emphasis of the panel discussion: Synopsys’ Aart de Geus,  Mentor’s Wally Rhines, Cadence’s Lip-bu Tan, ARM’s Simon Segars, and Gradient’s Ed Cheng in conversation with Ed Sperling, exchanging ideas about Different Problems in EDA: Tools, Power, IP, Memory, Integration, Systems, Hardware, Software, Money and Innovation.

 

 

Now let’s look at the Word Cloud without any of the names, just the issues that swirled about in the conversation on February 29th. (more…)

Unforgiven: EDAC CEOs at their iconic best

Saturday, March 17th, 2012

 

When it comes to Westerns, nothing satisfies more than the one about long-time compadres getting together to do one last ride, one last round up, to take one last stand.

It satisfies, because it’s been years in the making and involves all aspects of the genre – long, lonely shots of distant horizons, fading references to the “exploration and settlement of previously untamed frontiers”, and a rich narrative of “rugged, self-sufficient individuals taming a savage wilderness with common sense and direct action.”

This particular type of Western also satisfies, because we know the players well – their faces, their mannerisms, how many notches they’ve got in their gun belts, and whether they normally ride alone or in a posse. (more…)

Blue Pearl: Language Support & Workshops

Thursday, March 15th, 2012

 

If you missed this week’s Blue Pearl Software workshop in Silicon Valley, you’re in luck – they’re holding it again on April 19th.

These workshops offer not only the opportunity to learn about Blue Pearl’s technologies, they’ll also let you brush up on your acronyms – FPGA, ASIC, SOC, CDC, SDC, SV, VHDL, and RTL – though not necessarily in that order.

Blue Pearl sells a suite of tools offering “comprehensive RTL analysis, clock-domain crossing [CDC] checks, and automated Synopsys Design Constraints [SDC] generation for FPGA, ASIC, and SOC designs.”

Release 6.0 was announced in February at DVCon 2012, where I spoke with Shakeel Jeeawoody, Director of Product Marketing at Blue Pearl.

Jeeawoody said, “We provide tools for linting, clock-domain crossing, and automated SDC generation – things people use to constrain their synthesis. Here in Release 6.0, a major new feature includes language coverage. (more…)

IP Update: Buyers & Vendors Beware!

Saturday, March 10th, 2012

 

Even this deep into the era of IP and design reuse, it’s been my thesis that things are not quite as far along as many in the industry would like you to believe. With that attitude in hand, I spoke with three different companies in the IP space who disagree, although they admit issues still remain.

You can read my conclusions below from what they had to say, or you can read the original interviews and draw your own conclusions …

* Hal Barbour, CEO at CAST
* Warren Savage, CEO at IPextreme
Bernd Stamme, Marketing Director at Kilopass Technology

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Where things stand …

* IP is a reality: Over the last 10 years, the reluctance to buy IP has subsided, because third-party IP is better than ever, and the companies that sell it have come to see themselves principally as product companies, not services companies.

* Lots of different types of IP: Vendors are selling processor cores, standards-based busses, mixed-signal blocks, back-end design blocks, software blocks, drivers, foundation IP, etc., or any combination of the above.

* Standards and tools: Various wrapper standards and IP integration tools are easing the burden of using IP in a design.

* NIH still a reality: Concern still lingers, often without basis, that if I didn’t design it myself, I shouldn’t bank my product and my job on somebody else’s design bit.

* Risk Aversion still a reality: Buying IP is still not great for the highly risk adverse, people who need to guarantee a block is interoperable, meets required specs, and has been sufficiently deployed to work out the bugs. (more…)

IP Update: Stamme @ Kilopass

Saturday, March 10th, 2012

 

Even this deep into the era of IP and design reuse, it’s been my impression that things are not quite as far along as many in the industry would like you to believe. With that attitude in mind, I spoke with Bernd Stamme, Director of Marketing & Applications at Kilopass Technology, who convinced me otherwise, although with several caveats.

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Q: What kind of IP are people buying these days?

Bernd Stamme: They’re buying everything that has to do with performance – computer performance, networking performance, and elements that control that performance.

The one way you can distinguish yourself from the competition is to go faster. You can use IP for CPUs or GPUs, or off-the-shelf interfaces. At some point, you’ll run out of what you can get, however, and you’ll need to build auxiliary units around it to improve performance for certain operations. Then you’ll be building co-processors, specific circuits to accelerate [the system] and get better performance than your competition.

Q: How do you know what IP to use and when? (more…)

IP Update: Savage @ IPextreme

Thursday, March 8th, 2012

 

Even this deep into the era of IP and design reuse, it’s been my impression that things are not quite as far along as many in the industry would like you to believe. With that attitude in mind, I spoke with IPextreme CEO Warren Savage, who convinced me otherwise, although with several caveats.

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Q: Are people still reluctant to buy IP?

Warren Savage: That’s last century, and no longer a problem.

Q: How long has that been the case? 2 Years? 10 years?

Savage: I would say the pressure cooker that the semiconductor industry has gone through over the last decade has made that shift fully complete

Q: And is that true for all categories of IP?

Savage: I think so. We work with the large semiconductor companies with their internal IP. They’re definitely buying IP, although I’ve seen them creating IP when they need to differentiate around that block. We’re also seeing a shift in our business. Today we’re selling more differentiated IP, not commoditized IP.

Q: Can you define differentiated IP? (more…)

IP Update: Barbour @ CAST

Thursday, March 8th, 2012

 

Even this deep into the era of IP and design reuse, it’s been my impression that things are not quite as far along as many in the industry would like you to believe. With that attitude in mind, I spoke with CAST CEO Hal Barbour, who convinced me otherwise, although with several caveats.

****************

Q: Are people still reluctant to buy IP?

Hal Barbour: There’s been a big change. There used to be fly-by-night IP companies, which were really services companies, so people were leery.

Over the last few years, however, people have pulled back from those attitudes. Some “IP” companies have gone out of business – they couldn’t survive on just selling data sheets – while the established suppliers have become more mature. Now people know who is and isn’t [a reliable supplier].

Q: Was that the case 10 years ago, or has it evolved over the last decade?

Barbour: I would say 10 years ago, everybody was still leery. They didn’t know if they could trust outside suppliers.

But time to market pressures have grown such that people found they couldn’t reinvent the wheel for lots of the IP used by their competitors, or other people doing similar projects, so they started to go outside for processors and peripheral devices such as USBs, and so forth.

There’s still some concern lingering today – it’s not completely gone – but you’ll find that customers are definitely a lot more knowledgeable about IP.

Q: Are there tools available for comparing and contrasting similar IP offerings? (more…)

DATE: Design, Automation, Test & Embedded

Saturday, March 3rd, 2012

The premier EDA conference in Europe – many say, in the world – will be in Dresden this year, starting March 12th. There’s a certain something about DATE, a unique quality and consistent energy that runs throughout this conference that really sets it apart, whether in Nice, Munich, Grenoble, or Dresden.

Now in its 15th edition, Design, Automation & Test in Europe seems to get better with each passing year – more refined, focused, and confident, and more unabashedly academic, while still offering a rich experience for exhibitors wanting to showcase their latest and greatest.

With 55+ exhibitors this year, over 200 papers selected from almost a thousand submissions for the 2012 conference, 77 different technical sessions, keynotes from Bosch Automotive Electronics Division President Klaus Meder, and GlobalFoundries Senior Vice President for Design Enablement Mojy Chian, a host of tutorials, panel discussions, and workshops, a Sigda-sponsored PhD forum, and the annual EDAA Lifetime Achievement Award presentation – this year going to UC Berkeley’s own Prof. Alberto Sangiovanni-Vincentelli – DATE is on tap to deliver another terrific week-long event.

University of Tübingen Dean of Science Prof. Wolfgang Rosenstiel is General Chair for DATE 2012. Not surprisingly, when we spoke by phone on March 2nd, he was extremely enthused about the Dresden event. I asked him how the conference has evolved over the years.

Dr. Rosenstiel said, “DATE started in 1998 as the merger of two other European conferences, EURO-DAC and ED&T. Since then, DATE has taken place every year, mainly between France and Germany.

“What has changed over the years? While we have kept the central theme of design, automation, and test in Europe, from there we have widened the focus in two directions.

“The applications of microelectronics have come more clearly into focus at DATE, with special tracks which continue to grow, and there has been an increasing emphasis on embedded systems.

(more…)

Homework assignment: Synopsys Discovery VIP

Tuesday, February 28th, 2012

 

Your assignment, should you choose to accept it, is to understand the new VIP product suite out of Synopsys. That’s really not too hard – the press releases, FAQs, and presentations are all out there for the taking, if you just get your act together and do your homework.

Unfortunately, I hadn’t – at least, not before my phone call last Friday, February 24th, with Neill Mullinger, Group Marketing Manager for Verification IP at Synopsys, and Michael Sanie, Director of Verification Product Marketing.

The call went badly, I couldn’t fully grasp the subtleties of their presentation, and I was running late for another meeting. Turns out, if I had just studied the materials beforehand, not only would it have clarified things, we could have skipped the call completely. The info was all there in the marketing collateral.

Here’s what Niell and Michael were trying to tell me.

(more…)

Cal BEARS, Quad-copters, Surfers, and Swarms

Sunday, February 26th, 2012

 

Cal Berkeley EECS professor David Patterson did a great job this year organizing Berkeley’s EECS Annual Research Symposium on Thursday, February 23rd.

B.E.A.R.S. used to always be held in a theater in an engineering building on campus, however last year it was moved to International House to accomodate more people. But it was crowded and dark in there, and not a good fit.

This year, B.E.A.R.S. was held in Pauley Ballroom instead, atop the Student Union next to Sproul Plaza, and between great weather and plentiful refreshments, the audience of about 400 people seemed happier than ever to be there.

Good vibes in 2012 could also be attributed to Patterson’s choice of presenters, and the time allotted to each. Instead of the usual 10+ professors, each with 20 or 30 minutes to describe their research (academics who’ve consistently felt entitled to run long), Patterson limited faculty speakers this year to just 3. Each of them spoke succinctly and, miracle of miracles, stayed within their allotted time.

Hence, the fourth and final part of the 2012 program started on schedule, and consisted of 11 grad students talking for 5 minutes each about their respective research and labs. It was great – totally enjoyable and informative.

(more…)

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